android_kernel_motorola_sm6225/arch/riscv/kernel
Yash Shah db9138d06e RISC-V: Don't allow write+exec only page mapping request in mmap
[ Upstream commit e0d17c842c0f824fd4df9f4688709fc6907201e1 ]

As per the table 4.4 of version "20190608-Priv-MSU-Ratified" of the
RISC-V instruction set manual[0], the PTE permission bit combination of
"write+exec only" is reserved for future use. Hence, don't allow such
mapping request in mmap call.

An issue is been reported by David Abdurachmanov, that while running
stress-ng with "sysbadaddr" argument, RCU stalls are observed on RISC-V
specific kernel.

This issue arises when the stress-sysbadaddr request for pages with
"write+exec only" permission bits and then passes the address obtain
from this mmap call to various system call. For the riscv kernel, the
mmap call should fail for this particular combination of permission bits
since it's not valid.

[0]: http://dabbelt.com/~palmer/keep/riscv-isa-manual/riscv-privileged-20190608-1.pdf

Signed-off-by: Yash Shah <yash.shah@sifive.com>
Reported-by: David Abdurachmanov <david.abdurachmanov@gmail.com>
[Palmer: Refer to the latest ISA specification at the only link I could
find, and update the terminology.]
Signed-off-by: Palmer Dabbelt <palmerdabbelt@google.com>
Signed-off-by: Sasha Levin <sashal@kernel.org>
2020-06-30 23:17:15 -04:00
..
vdso riscv: fix vdso build with lld 2020-05-20 08:18:39 +02:00
.gitignore RISC-V: Build Infrastructure 2017-09-26 15:26:49 -07:00
asm-offsets.c RISC-V: Task implementation 2017-09-26 15:26:46 -07:00
cacheinfo.c drivers: base: cacheinfo: setup DT cache properties early 2018-05-17 17:27:49 +01:00
cpu.c
cpufeature.c RISC-V: User-facing API 2017-09-26 15:26:48 -07:00
entry.S riscv: Avoid interrupts being erroneously enabled in handle_exception() 2019-10-11 18:21:29 +02:00
ftrace.c riscv: ftrace: correct the condition logic in function graph tracer 2020-01-09 10:19:02 +01:00
head.S RISC-V: Add the directive for alignment of stvec's value 2018-08-13 08:31:31 -07:00
irq.c clocksource: new RISC-V SBI timer driver 2018-08-13 08:31:31 -07:00
Makefile perf: riscv: preliminary RISC-V support 2018-06-04 14:02:01 -07:00
mcount-dyn.S riscv/ftrace: Add DYNAMIC_FTRACE_WITH_REGS support 2018-04-02 19:59:13 -07:00
mcount.S riscv/ftrace: Export _mcount when DYNAMIC_FTRACE isn't set 2018-06-11 09:04:03 -07:00
module-sections.c RISC-V: Add section of GOT.PLT for kernel module 2018-04-02 20:00:54 -07:00
module.c riscv: avoid the PIC offset of static percpu data in module beyond 2G limits 2020-03-25 08:06:07 +01:00
module.lds RISC-V: Add section of GOT.PLT for kernel module 2018-04-02 20:00:54 -07:00
perf_event.c RISC-V: Fix !CONFIG_SMP compilation error 2018-08-13 08:31:32 -07:00
process.c Merge branch 'work.whack-a-mole' of git://git.kernel.org/pub/scm/linux/kernel/git/viro/vfs 2018-01-31 19:18:12 -08:00
ptrace.c riscv: fix trace_sys_exit hook 2019-02-20 10:25:40 +01:00
reset.c
riscv_ksyms.c riscv: split the declaration of __copy_user 2018-06-09 12:34:31 -07:00
setup.c riscv: set max_pfn to the PFN of the last page 2020-05-27 17:37:28 +02:00
signal.c RISC-V: User-facing API 2017-09-26 15:26:48 -07:00
smp.c RISC-V: simplify software interrupt / IPI code 2018-08-13 08:31:30 -07:00
smpboot.c clocksource: new RISC-V SBI timer driver 2018-08-13 08:31:31 -07:00
stacktrace.c riscv: stacktrace: Fix undefined reference to `walk_stackframe' 2020-06-03 08:19:30 +02:00
sys_riscv.c RISC-V: Don't allow write+exec only page mapping request in mmap 2020-06-30 23:17:15 -04:00
syscall_table.c RISC-V: Make __NR_riscv_flush_icache visible to userspace 2018-01-07 15:14:37 -08:00
time.c clocksource: new RISC-V SBI timer driver 2018-08-13 08:31:31 -07:00
traps.c RISC-V: Don't increment sepc after breakpoint. 2018-08-13 08:31:30 -07:00
vdso.c riscv: remove redundant unlikely() 2018-01-30 19:12:06 -08:00
vmlinux.lds.S RISC-V: Build Infrastructure 2017-09-26 15:26:49 -07:00