85f8879ca4
The second cell in the PWM specifier denotes the period in nanoseconds, not the duty cycle. The latter can be freely configured at runtime and a PWM with a fixed duty cycle would be rather pointless. Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de> Cc: Shawn Guo <shawn.guo@linaro.org> Cc: Sascha Hauer <s.hauer@pengutronix.de> Cc: Philipp Zabel <p.zabel@pengutronix.de> Cc: "Benoît Thébaudeau" <benoit.thebaudeau@advansee.com> Cc: Stephen Warren <swarren@wwwdotorg.org> Acked-by: Sascha Hauer <s.hauer@pengutronix.de> Acked-by: Shawn Guo <shawn.guo@linaro.org>
18 lines
508 B
Text
18 lines
508 B
Text
Tegra SoC PWFM controller
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Required properties:
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- compatible: should be one of:
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- "nvidia,tegra20-pwm"
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- "nvidia,tegra30-pwm"
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- reg: physical base address and length of the controller's registers
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- #pwm-cells: On Tegra the number of cells used to specify a PWM is 2. The
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first cell specifies the per-chip index of the PWM to use and the second
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cell is the period in nanoseconds.
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Example:
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pwm: pwm@7000a000 {
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compatible = "nvidia,tegra20-pwm";
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reg = <0x7000a000 0x100>;
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#pwm-cells = <2>;
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};
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