309 lines
8.7 KiB
C
309 lines
8.7 KiB
C
/*
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* drivers/ide/pci/tc86c001.c Version 1.00 Dec 12, 2006
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*
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* Copyright (C) 2002 Toshiba Corporation
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* Copyright (C) 2005-2006 MontaVista Software, Inc. <source@mvista.com>
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*
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* This file is licensed under the terms of the GNU General Public
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* License version 2. This program is licensed "as is" without any
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* warranty of any kind, whether express or implied.
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*/
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#include <linux/types.h>
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#include <linux/pci.h>
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#include <linux/ide.h>
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static inline u8 tc86c001_ratemask(ide_drive_t *drive)
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{
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return eighty_ninty_three(drive) ? 2 : 1;
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}
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static int tc86c001_tune_chipset(ide_drive_t *drive, u8 speed)
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{
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ide_hwif_t *hwif = HWIF(drive);
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unsigned long scr_port = hwif->config_data + (drive->dn ? 0x02 : 0x00);
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u16 mode, scr = hwif->INW(scr_port);
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speed = ide_rate_filter(tc86c001_ratemask(drive), speed);
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switch (speed) {
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case XFER_UDMA_4: mode = 0x00c0; break;
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case XFER_UDMA_3: mode = 0x00b0; break;
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case XFER_UDMA_2: mode = 0x00a0; break;
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case XFER_UDMA_1: mode = 0x0090; break;
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case XFER_UDMA_0: mode = 0x0080; break;
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case XFER_MW_DMA_2: mode = 0x0070; break;
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case XFER_MW_DMA_1: mode = 0x0060; break;
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case XFER_MW_DMA_0: mode = 0x0050; break;
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case XFER_PIO_4: mode = 0x0400; break;
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case XFER_PIO_3: mode = 0x0300; break;
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case XFER_PIO_2: mode = 0x0200; break;
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case XFER_PIO_1: mode = 0x0100; break;
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case XFER_PIO_0:
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default: mode = 0x0000; break;
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}
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scr &= (speed < XFER_MW_DMA_0) ? 0xf8ff : 0xff0f;
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scr |= mode;
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hwif->OUTW(scr, scr_port);
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return ide_config_drive_speed(drive, speed);
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}
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static void tc86c001_tune_drive(ide_drive_t *drive, u8 pio)
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{
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pio = ide_get_best_pio_mode(drive, pio, 4, NULL);
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(void) tc86c001_tune_chipset(drive, XFER_PIO_0 + pio);
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}
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/*
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* HACKITY HACK
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*
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* This is a workaround for the limitation 5 of the TC86C001 IDE controller:
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* if a DMA transfer terminates prematurely, the controller leaves the device's
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* interrupt request (INTRQ) pending and does not generate a PCI interrupt (or
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* set the interrupt bit in the DMA status register), thus no PCI interrupt
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* will occur until a DMA transfer has been successfully completed.
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*
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* We work around this by initiating dummy, zero-length DMA transfer on
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* a DMA timeout expiration. I found no better way to do this with the current
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* IDE core than to temporarily replace a higher level driver's timer expiry
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* handler with our own backing up to that handler in case our recovery fails.
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*/
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static int tc86c001_timer_expiry(ide_drive_t *drive)
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{
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ide_hwif_t *hwif = HWIF(drive);
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ide_expiry_t *expiry = ide_get_hwifdata(hwif);
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ide_hwgroup_t *hwgroup = HWGROUP(drive);
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u8 dma_stat = hwif->INB(hwif->dma_status);
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/* Restore a higher level driver's expiry handler first. */
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hwgroup->expiry = expiry;
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if ((dma_stat & 5) == 1) { /* DMA active and no interrupt */
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unsigned long sc_base = hwif->config_data;
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unsigned long twcr_port = sc_base + (drive->dn ? 0x06 : 0x04);
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u8 dma_cmd = hwif->INB(hwif->dma_command);
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printk(KERN_WARNING "%s: DMA interrupt possibly stuck, "
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"attempting recovery...\n", drive->name);
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/* Stop DMA */
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hwif->OUTB(dma_cmd & ~0x01, hwif->dma_command);
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/* Setup the dummy DMA transfer */
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hwif->OUTW(0, sc_base + 0x0a); /* Sector Count */
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hwif->OUTW(0, twcr_port); /* Transfer Word Count 1 or 2 */
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/* Start the dummy DMA transfer */
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hwif->OUTB(0x00, hwif->dma_command); /* clear R_OR_WCTR for write */
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hwif->OUTB(0x01, hwif->dma_command); /* set START_STOPBM */
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/*
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* If an interrupt was pending, it should come thru shortly.
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* If not, a higher level driver's expiry handler should
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* eventually cause some kind of recovery from the DMA stall.
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*/
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return WAIT_MIN_SLEEP;
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}
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/* Chain to the restored expiry handler if DMA wasn't active. */
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if (likely(expiry != NULL))
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return expiry(drive);
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/* If there was no handler, "emulate" that for ide_timer_expiry()... */
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return -1;
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}
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static void tc86c001_dma_start(ide_drive_t *drive)
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{
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ide_hwif_t *hwif = HWIF(drive);
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ide_hwgroup_t *hwgroup = HWGROUP(drive);
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unsigned long sc_base = hwif->config_data;
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unsigned long twcr_port = sc_base + (drive->dn ? 0x06 : 0x04);
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unsigned long nsectors = hwgroup->rq->nr_sectors;
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/*
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* We have to manually load the sector count and size into
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* the appropriate system control registers for DMA to work
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* with LBA48 and ATAPI devices...
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*/
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hwif->OUTW(nsectors, sc_base + 0x0a); /* Sector Count */
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hwif->OUTW(SECTOR_SIZE / 2, twcr_port); /* Transfer Word Count 1/2 */
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/* Install our timeout expiry hook, saving the current handler... */
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ide_set_hwifdata(hwif, hwgroup->expiry);
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hwgroup->expiry = &tc86c001_timer_expiry;
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ide_dma_start(drive);
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}
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static int tc86c001_busproc(ide_drive_t *drive, int state)
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{
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ide_hwif_t *hwif = HWIF(drive);
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unsigned long sc_base = hwif->config_data;
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u16 scr1;
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/* System Control 1 Register bit 11 (ATA Hard Reset) read */
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scr1 = hwif->INW(sc_base + 0x00);
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switch (state) {
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case BUSSTATE_ON:
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if (!(scr1 & 0x0800))
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return 0;
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scr1 &= ~0x0800;
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hwif->drives[0].failures = hwif->drives[1].failures = 0;
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break;
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case BUSSTATE_OFF:
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if (scr1 & 0x0800)
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return 0;
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scr1 |= 0x0800;
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hwif->drives[0].failures = hwif->drives[0].max_failures + 1;
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hwif->drives[1].failures = hwif->drives[1].max_failures + 1;
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break;
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default:
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return -EINVAL;
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}
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/* System Control 1 Register bit 11 (ATA Hard Reset) write */
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hwif->OUTW(scr1, sc_base + 0x00);
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return 0;
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}
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static int config_chipset_for_dma(ide_drive_t *drive)
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{
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u8 speed = ide_dma_speed(drive, tc86c001_ratemask(drive));
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if (!speed)
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return 0;
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(void) tc86c001_tune_chipset(drive, speed);
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return ide_dma_enable(drive);
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}
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static int tc86c001_config_drive_xfer_rate(ide_drive_t *drive)
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{
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ide_hwif_t *hwif = HWIF(drive);
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struct hd_driveid *id = drive->id;
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if ((id->capability & 1) && drive->autodma) {
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if (ide_use_dma(drive) && config_chipset_for_dma(drive))
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return hwif->ide_dma_on(drive);
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goto fast_ata_pio;
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} else if ((id->capability & 8) || (id->field_valid & 2)) {
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fast_ata_pio:
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tc86c001_tune_drive(drive, 255);
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return hwif->ide_dma_off_quietly(drive);
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}
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/* IORDY not supported */
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return 0;
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}
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static void __devinit init_hwif_tc86c001(ide_hwif_t *hwif)
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{
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unsigned long sc_base = pci_resource_start(hwif->pci_dev, 5);
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u16 scr1 = hwif->INW(sc_base + 0x00);;
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/* System Control 1 Register bit 15 (Soft Reset) set */
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hwif->OUTW(scr1 | 0x8000, sc_base + 0x00);
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/* System Control 1 Register bit 14 (FIFO Reset) set */
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hwif->OUTW(scr1 | 0x4000, sc_base + 0x00);
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/* System Control 1 Register: reset clear */
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hwif->OUTW(scr1 & ~0xc000, sc_base + 0x00);
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/* Store the system control register base for convenience... */
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hwif->config_data = sc_base;
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hwif->tuneproc = &tc86c001_tune_drive;
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hwif->speedproc = &tc86c001_tune_chipset;
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hwif->busproc = &tc86c001_busproc;
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hwif->drives[0].autotune = hwif->drives[1].autotune = 1;
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if (!hwif->dma_base)
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return;
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/*
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* Sector Count Control Register bits 0 and 1 set:
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* software sets Sector Count Register for master and slave device
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*/
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hwif->OUTW(0x0003, sc_base + 0x0c);
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/* Sector Count Register limit */
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hwif->rqsize = 0xffff;
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hwif->atapi_dma = 1;
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hwif->ultra_mask = 0x1f;
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hwif->mwdma_mask = 0x07;
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hwif->ide_dma_check = &tc86c001_config_drive_xfer_rate;
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hwif->dma_start = &tc86c001_dma_start;
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if (!hwif->udma_four) {
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/*
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* System Control 1 Register bit 13 (PDIAGN):
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* 0=80-pin cable, 1=40-pin cable
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*/
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scr1 = hwif->INW(sc_base + 0x00);
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hwif->udma_four = (scr1 & 0x2000) ? 0 : 1;
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}
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if (!noautodma)
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hwif->autodma = 1;
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hwif->drives[0].autodma = hwif->drives[1].autodma = hwif->autodma;
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}
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static unsigned int __devinit init_chipset_tc86c001(struct pci_dev *dev,
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const char *name)
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{
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int err = pci_request_region(dev, 5, name);
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if (err)
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printk(KERN_ERR "%s: system control regs already in use", name);
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return err;
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}
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static ide_pci_device_t tc86c001_chipset __devinitdata = {
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.name = "TC86C001",
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.init_chipset = init_chipset_tc86c001,
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.init_hwif = init_hwif_tc86c001,
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.channels = 1,
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.autodma = AUTODMA,
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.bootable = OFF_BOARD
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};
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static int __devinit tc86c001_init_one(struct pci_dev *dev,
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const struct pci_device_id *id)
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{
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return ide_setup_pci_device(dev, &tc86c001_chipset);
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}
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static struct pci_device_id tc86c001_pci_tbl[] = {
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{ PCI_VENDOR_ID_TOSHIBA_2, PCI_DEVICE_ID_TOSHIBA_TC86C001_IDE,
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PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
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{ 0, }
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};
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MODULE_DEVICE_TABLE(pci, tc86c001_pci_tbl);
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static struct pci_driver driver = {
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.name = "TC86C001",
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.id_table = tc86c001_pci_tbl,
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.probe = tc86c001_init_one
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};
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static int __init tc86c001_ide_init(void)
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{
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return ide_pci_register_driver(&driver);
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}
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module_init(tc86c001_ide_init);
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MODULE_AUTHOR("MontaVista Software, Inc. <source@mvista.com>");
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MODULE_DESCRIPTION("PCI driver module for TC86C001 IDE");
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MODULE_LICENSE("GPL");
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