62152d0ea7
bring back the avr32, blackfin, sh, sparc architectures into working order,
by reverting the effects of this change that came in via the x86 tree:
commit a5a19c63f4
Author: Jeremy Fitzhardinge <jeremy@goop.org>
Date: Wed Jan 30 13:33:39 2008 +0100
x86: demacro asm-x86/pgalloc_32.h
Sorry about that!
Signed-off-by: Ingo Molnar <mingo@elte.hu>
149 lines
3.8 KiB
C
149 lines
3.8 KiB
C
/* include/asm-generic/tlb.h
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*
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* Generic TLB shootdown code
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*
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* Copyright 2001 Red Hat, Inc.
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* Based on code from mm/memory.c Copyright Linus Torvalds and others.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version
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* 2 of the License, or (at your option) any later version.
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*/
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#ifndef _ASM_GENERIC__TLB_H
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#define _ASM_GENERIC__TLB_H
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#include <linux/swap.h>
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#include <linux/quicklist.h>
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#include <asm/pgalloc.h>
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#include <asm/tlbflush.h>
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/*
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* For UP we don't need to worry about TLB flush
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* and page free order so much..
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*/
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#ifdef CONFIG_SMP
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#ifdef ARCH_FREE_PTR_NR
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#define FREE_PTR_NR ARCH_FREE_PTR_NR
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#else
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#define FREE_PTE_NR 506
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#endif
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#define tlb_fast_mode(tlb) ((tlb)->nr == ~0U)
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#else
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#define FREE_PTE_NR 1
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#define tlb_fast_mode(tlb) 1
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#endif
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/* struct mmu_gather is an opaque type used by the mm code for passing around
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* any data needed by arch specific code for tlb_remove_page.
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*/
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struct mmu_gather {
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struct mm_struct *mm;
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unsigned int nr; /* set to ~0U means fast mode */
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unsigned int need_flush;/* Really unmapped some ptes? */
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unsigned int fullmm; /* non-zero means full mm flush */
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struct page * pages[FREE_PTE_NR];
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};
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/* Users of the generic TLB shootdown code must declare this storage space. */
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DECLARE_PER_CPU(struct mmu_gather, mmu_gathers);
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/* tlb_gather_mmu
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* Return a pointer to an initialized struct mmu_gather.
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*/
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static inline struct mmu_gather *
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tlb_gather_mmu(struct mm_struct *mm, unsigned int full_mm_flush)
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{
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struct mmu_gather *tlb = &get_cpu_var(mmu_gathers);
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tlb->mm = mm;
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/* Use fast mode if only one CPU is online */
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tlb->nr = num_online_cpus() > 1 ? 0U : ~0U;
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tlb->fullmm = full_mm_flush;
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return tlb;
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}
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static inline void
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tlb_flush_mmu(struct mmu_gather *tlb, unsigned long start, unsigned long end)
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{
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if (!tlb->need_flush)
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return;
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tlb->need_flush = 0;
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tlb_flush(tlb);
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if (!tlb_fast_mode(tlb)) {
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free_pages_and_swap_cache(tlb->pages, tlb->nr);
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tlb->nr = 0;
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}
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}
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/* tlb_finish_mmu
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* Called at the end of the shootdown operation to free up any resources
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* that were required.
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*/
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static inline void
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tlb_finish_mmu(struct mmu_gather *tlb, unsigned long start, unsigned long end)
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{
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tlb_flush_mmu(tlb, start, end);
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/* keep the page table cache within bounds */
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check_pgt_cache();
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put_cpu_var(mmu_gathers);
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}
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/* tlb_remove_page
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* Must perform the equivalent to __free_pte(pte_get_and_clear(ptep)), while
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* handling the additional races in SMP caused by other CPUs caching valid
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* mappings in their TLBs.
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*/
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static inline void tlb_remove_page(struct mmu_gather *tlb, struct page *page)
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{
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tlb->need_flush = 1;
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if (tlb_fast_mode(tlb)) {
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free_page_and_swap_cache(page);
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return;
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}
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tlb->pages[tlb->nr++] = page;
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if (tlb->nr >= FREE_PTE_NR)
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tlb_flush_mmu(tlb, 0, 0);
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}
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/**
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* tlb_remove_tlb_entry - remember a pte unmapping for later tlb invalidation.
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*
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* Record the fact that pte's were really umapped in ->need_flush, so we can
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* later optimise away the tlb invalidate. This helps when userspace is
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* unmapping already-unmapped pages, which happens quite a lot.
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*/
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#define tlb_remove_tlb_entry(tlb, ptep, address) \
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do { \
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tlb->need_flush = 1; \
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__tlb_remove_tlb_entry(tlb, ptep, address); \
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} while (0)
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#define pte_free_tlb(tlb, ptep) \
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do { \
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tlb->need_flush = 1; \
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__pte_free_tlb(tlb, ptep); \
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} while (0)
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#ifndef __ARCH_HAS_4LEVEL_HACK
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#define pud_free_tlb(tlb, pudp) \
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do { \
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tlb->need_flush = 1; \
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__pud_free_tlb(tlb, pudp); \
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} while (0)
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#endif
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#define pmd_free_tlb(tlb, pmdp) \
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do { \
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tlb->need_flush = 1; \
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__pmd_free_tlb(tlb, pmdp); \
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} while (0)
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#define tlb_migrate_finish(mm) do {} while (0)
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#endif /* _ASM_GENERIC__TLB_H */
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