284901a90a
Replace all DMA_32BIT_MASK macro with DMA_BIT_MASK(32) Signed-off-by: Yang Hongyang<yanghy@cn.fujitsu.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
496 lines
12 KiB
C
496 lines
12 KiB
C
/*
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* PCI handling of I2O controller
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*
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* Copyright (C) 1999-2002 Red Hat Software
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*
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* Written by Alan Cox, Building Number Three Ltd
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*
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* A lot of the I2O message side code from this is taken from the Red
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* Creek RCPCI45 adapter driver by Red Creek Communications
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*
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* Fixes/additions:
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* Philipp Rumpf
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* Juha Sievänen <Juha.Sievanen@cs.Helsinki.FI>
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* Auvo Häkkinen <Auvo.Hakkinen@cs.Helsinki.FI>
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* Deepak Saxena <deepak@plexity.net>
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* Boji T Kannanthanam <boji.t.kannanthanam@intel.com>
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* Alan Cox <alan@lxorguk.ukuu.org.uk>:
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* Ported to Linux 2.5.
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* Markus Lidel <Markus.Lidel@shadowconnect.com>:
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* Minor fixes for 2.6.
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* Markus Lidel <Markus.Lidel@shadowconnect.com>:
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* Support for sysfs included.
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*/
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#include <linux/pci.h>
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#include <linux/interrupt.h>
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#include <linux/i2o.h>
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#include "core.h"
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#define OSM_DESCRIPTION "I2O-subsystem"
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/* PCI device id table for all I2O controllers */
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static struct pci_device_id __devinitdata i2o_pci_ids[] = {
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{PCI_DEVICE_CLASS(PCI_CLASS_INTELLIGENT_I2O << 8, 0xffff00)},
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{PCI_DEVICE(PCI_VENDOR_ID_DPT, 0xa511)},
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{.vendor = PCI_VENDOR_ID_INTEL,.device = 0x1962,
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.subvendor = PCI_VENDOR_ID_PROMISE,.subdevice = PCI_ANY_ID},
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{0}
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};
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/**
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* i2o_pci_free - Frees the DMA memory for the I2O controller
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* @c: I2O controller to free
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*
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* Remove all allocated DMA memory and unmap memory IO regions. If MTRR
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* is enabled, also remove it again.
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*/
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static void i2o_pci_free(struct i2o_controller *c)
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{
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struct device *dev;
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dev = &c->pdev->dev;
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i2o_dma_free(dev, &c->out_queue);
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i2o_dma_free(dev, &c->status_block);
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kfree(c->lct);
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i2o_dma_free(dev, &c->dlct);
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i2o_dma_free(dev, &c->hrt);
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i2o_dma_free(dev, &c->status);
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if (c->raptor && c->in_queue.virt)
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iounmap(c->in_queue.virt);
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if (c->base.virt)
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iounmap(c->base.virt);
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pci_release_regions(c->pdev);
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}
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/**
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* i2o_pci_alloc - Allocate DMA memory, map IO memory for I2O controller
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* @c: I2O controller
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*
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* Allocate DMA memory for a PCI (or in theory AGP) I2O controller. All
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* IO mappings are also done here. If MTRR is enabled, also do add memory
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* regions here.
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*
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* Returns 0 on success or negative error code on failure.
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*/
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static int __devinit i2o_pci_alloc(struct i2o_controller *c)
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{
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struct pci_dev *pdev = c->pdev;
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struct device *dev = &pdev->dev;
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int i;
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if (pci_request_regions(pdev, OSM_DESCRIPTION)) {
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printk(KERN_ERR "%s: device already claimed\n", c->name);
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return -ENODEV;
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}
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for (i = 0; i < 6; i++) {
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/* Skip I/O spaces */
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if (!(pci_resource_flags(pdev, i) & IORESOURCE_IO)) {
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if (!c->base.phys) {
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c->base.phys = pci_resource_start(pdev, i);
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c->base.len = pci_resource_len(pdev, i);
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/*
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* If we know what card it is, set the size
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* correctly. Code is taken from dpt_i2o.c
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*/
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if (pdev->device == 0xa501) {
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if (pdev->subsystem_device >= 0xc032 &&
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pdev->subsystem_device <= 0xc03b) {
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if (c->base.len > 0x400000)
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c->base.len = 0x400000;
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} else {
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if (c->base.len > 0x100000)
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c->base.len = 0x100000;
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}
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}
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if (!c->raptor)
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break;
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} else {
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c->in_queue.phys = pci_resource_start(pdev, i);
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c->in_queue.len = pci_resource_len(pdev, i);
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break;
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}
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}
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}
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if (i == 6) {
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printk(KERN_ERR "%s: I2O controller has no memory regions"
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" defined.\n", c->name);
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i2o_pci_free(c);
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return -EINVAL;
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}
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/* Map the I2O controller */
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if (c->raptor) {
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printk(KERN_INFO "%s: PCI I2O controller\n", c->name);
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printk(KERN_INFO " BAR0 at 0x%08lX size=%ld\n",
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(unsigned long)c->base.phys, (unsigned long)c->base.len);
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printk(KERN_INFO " BAR1 at 0x%08lX size=%ld\n",
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(unsigned long)c->in_queue.phys,
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(unsigned long)c->in_queue.len);
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} else
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printk(KERN_INFO "%s: PCI I2O controller at %08lX size=%ld\n",
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c->name, (unsigned long)c->base.phys,
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(unsigned long)c->base.len);
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c->base.virt = ioremap_nocache(c->base.phys, c->base.len);
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if (!c->base.virt) {
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printk(KERN_ERR "%s: Unable to map controller.\n", c->name);
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i2o_pci_free(c);
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return -ENOMEM;
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}
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if (c->raptor) {
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c->in_queue.virt =
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ioremap_nocache(c->in_queue.phys, c->in_queue.len);
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if (!c->in_queue.virt) {
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printk(KERN_ERR "%s: Unable to map controller.\n",
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c->name);
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i2o_pci_free(c);
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return -ENOMEM;
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}
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} else
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c->in_queue = c->base;
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c->irq_status = c->base.virt + I2O_IRQ_STATUS;
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c->irq_mask = c->base.virt + I2O_IRQ_MASK;
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c->in_port = c->base.virt + I2O_IN_PORT;
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c->out_port = c->base.virt + I2O_OUT_PORT;
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/* Motorola/Freescale chip does not follow spec */
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if (pdev->vendor == PCI_VENDOR_ID_MOTOROLA && pdev->device == 0x18c0) {
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/* Check if CPU is enabled */
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if (be32_to_cpu(readl(c->base.virt + 0x10000)) & 0x10000000) {
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printk(KERN_INFO "%s: MPC82XX needs CPU running to "
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"service I2O.\n", c->name);
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i2o_pci_free(c);
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return -ENODEV;
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} else {
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c->irq_status += I2O_MOTOROLA_PORT_OFFSET;
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c->irq_mask += I2O_MOTOROLA_PORT_OFFSET;
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c->in_port += I2O_MOTOROLA_PORT_OFFSET;
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c->out_port += I2O_MOTOROLA_PORT_OFFSET;
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printk(KERN_INFO "%s: MPC82XX workarounds activated.\n",
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c->name);
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}
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}
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if (i2o_dma_alloc(dev, &c->status, 8)) {
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i2o_pci_free(c);
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return -ENOMEM;
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}
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if (i2o_dma_alloc(dev, &c->hrt, sizeof(i2o_hrt))) {
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i2o_pci_free(c);
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return -ENOMEM;
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}
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if (i2o_dma_alloc(dev, &c->dlct, 8192)) {
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i2o_pci_free(c);
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return -ENOMEM;
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}
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if (i2o_dma_alloc(dev, &c->status_block, sizeof(i2o_status_block))) {
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i2o_pci_free(c);
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return -ENOMEM;
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}
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if (i2o_dma_alloc(dev, &c->out_queue,
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I2O_MAX_OUTBOUND_MSG_FRAMES * I2O_OUTBOUND_MSG_FRAME_SIZE *
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sizeof(u32))) {
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i2o_pci_free(c);
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return -ENOMEM;
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}
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pci_set_drvdata(pdev, c);
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return 0;
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}
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/**
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* i2o_pci_interrupt - Interrupt handler for I2O controller
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* @irq: interrupt line
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* @dev_id: pointer to the I2O controller
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*
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* Handle an interrupt from a PCI based I2O controller. This turns out
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* to be rather simple. We keep the controller pointer in the cookie.
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*/
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static irqreturn_t i2o_pci_interrupt(int irq, void *dev_id)
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{
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struct i2o_controller *c = dev_id;
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u32 m;
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irqreturn_t rc = IRQ_NONE;
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while (readl(c->irq_status) & I2O_IRQ_OUTBOUND_POST) {
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m = readl(c->out_port);
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if (m == I2O_QUEUE_EMPTY) {
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/*
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* Old 960 steppings had a bug in the I2O unit that
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* caused the queue to appear empty when it wasn't.
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*/
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m = readl(c->out_port);
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if (unlikely(m == I2O_QUEUE_EMPTY))
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break;
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}
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/* dispatch it */
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if (i2o_driver_dispatch(c, m))
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/* flush it if result != 0 */
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i2o_flush_reply(c, m);
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rc = IRQ_HANDLED;
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}
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return rc;
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}
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/**
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* i2o_pci_irq_enable - Allocate interrupt for I2O controller
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* @c: i2o_controller that the request is for
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*
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* Allocate an interrupt for the I2O controller, and activate interrupts
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* on the I2O controller.
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*
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* Returns 0 on success or negative error code on failure.
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*/
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static int i2o_pci_irq_enable(struct i2o_controller *c)
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{
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struct pci_dev *pdev = c->pdev;
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int rc;
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writel(0xffffffff, c->irq_mask);
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if (pdev->irq) {
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rc = request_irq(pdev->irq, i2o_pci_interrupt, IRQF_SHARED,
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c->name, c);
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if (rc < 0) {
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printk(KERN_ERR "%s: unable to allocate interrupt %d."
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"\n", c->name, pdev->irq);
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return rc;
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}
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}
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writel(0x00000000, c->irq_mask);
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printk(KERN_INFO "%s: Installed at IRQ %d\n", c->name, pdev->irq);
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return 0;
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}
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/**
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* i2o_pci_irq_disable - Free interrupt for I2O controller
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* @c: I2O controller
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*
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* Disable interrupts in I2O controller and then free interrupt.
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*/
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static void i2o_pci_irq_disable(struct i2o_controller *c)
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{
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writel(0xffffffff, c->irq_mask);
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if (c->pdev->irq > 0)
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free_irq(c->pdev->irq, c);
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}
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/**
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* i2o_pci_probe - Probe the PCI device for an I2O controller
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* @pdev: PCI device to test
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* @id: id which matched with the PCI device id table
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*
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* Probe the PCI device for any device which is a memory of the
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* Intelligent, I2O class or an Adaptec Zero Channel Controller. We
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* attempt to set up each such device and register it with the core.
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*
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* Returns 0 on success or negative error code on failure.
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*/
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static int __devinit i2o_pci_probe(struct pci_dev *pdev,
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const struct pci_device_id *id)
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{
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struct i2o_controller *c;
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int rc;
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struct pci_dev *i960 = NULL;
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printk(KERN_INFO "i2o: Checking for PCI I2O controllers...\n");
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if ((pdev->class & 0xff) > 1) {
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printk(KERN_WARNING "i2o: %s does not support I2O 1.5 "
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"(skipping).\n", pci_name(pdev));
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return -ENODEV;
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}
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if ((rc = pci_enable_device(pdev))) {
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printk(KERN_WARNING "i2o: couldn't enable device %s\n",
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pci_name(pdev));
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return rc;
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}
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if (pci_set_dma_mask(pdev, DMA_BIT_MASK(32))) {
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printk(KERN_WARNING "i2o: no suitable DMA found for %s\n",
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pci_name(pdev));
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rc = -ENODEV;
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goto disable;
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}
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pci_set_master(pdev);
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c = i2o_iop_alloc();
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if (IS_ERR(c)) {
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printk(KERN_ERR "i2o: couldn't allocate memory for %s\n",
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pci_name(pdev));
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rc = PTR_ERR(c);
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goto disable;
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} else
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printk(KERN_INFO "%s: controller found (%s)\n", c->name,
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pci_name(pdev));
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c->pdev = pdev;
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c->device.parent = &pdev->dev;
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/* Cards that fall apart if you hit them with large I/O loads... */
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if (pdev->vendor == PCI_VENDOR_ID_NCR && pdev->device == 0x0630) {
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c->short_req = 1;
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printk(KERN_INFO "%s: Symbios FC920 workarounds activated.\n",
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c->name);
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}
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if (pdev->subsystem_vendor == PCI_VENDOR_ID_PROMISE) {
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/*
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* Expose the ship behind i960 for initialization, or it will
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* failed
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*/
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i960 = pci_get_slot(c->pdev->bus,
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PCI_DEVFN(PCI_SLOT(c->pdev->devfn), 0));
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if (i960) {
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pci_write_config_word(i960, 0x42, 0);
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pci_dev_put(i960);
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}
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c->promise = 1;
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c->limit_sectors = 1;
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}
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if (pdev->subsystem_vendor == PCI_VENDOR_ID_DPT)
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c->adaptec = 1;
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/* Cards that go bananas if you quiesce them before you reset them. */
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if (pdev->vendor == PCI_VENDOR_ID_DPT) {
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c->no_quiesce = 1;
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if (pdev->device == 0xa511)
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c->raptor = 1;
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if (pdev->subsystem_device == 0xc05a) {
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c->limit_sectors = 1;
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printk(KERN_INFO
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"%s: limit sectors per request to %d\n", c->name,
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I2O_MAX_SECTORS_LIMITED);
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}
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#ifdef CONFIG_I2O_EXT_ADAPTEC_DMA64
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if (sizeof(dma_addr_t) > 4) {
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if (pci_set_dma_mask(pdev, DMA_BIT_MASK(64)))
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printk(KERN_INFO "%s: 64-bit DMA unavailable\n",
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c->name);
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else {
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c->pae_support = 1;
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printk(KERN_INFO "%s: using 64-bit DMA\n",
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c->name);
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}
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}
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#endif
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}
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if ((rc = i2o_pci_alloc(c))) {
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printk(KERN_ERR "%s: DMA / IO allocation for I2O controller "
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"failed\n", c->name);
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goto free_controller;
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}
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if (i2o_pci_irq_enable(c)) {
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printk(KERN_ERR "%s: unable to enable interrupts for I2O "
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"controller\n", c->name);
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goto free_pci;
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}
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if ((rc = i2o_iop_add(c)))
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goto uninstall;
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if (i960)
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pci_write_config_word(i960, 0x42, 0x03ff);
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return 0;
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uninstall:
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i2o_pci_irq_disable(c);
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free_pci:
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i2o_pci_free(c);
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free_controller:
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i2o_iop_free(c);
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disable:
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pci_disable_device(pdev);
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return rc;
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}
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/**
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* i2o_pci_remove - Removes a I2O controller from the system
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* @pdev: I2O controller which should be removed
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*
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* Reset the I2O controller, disable interrupts and remove all allocated
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* resources.
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*/
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static void __devexit i2o_pci_remove(struct pci_dev *pdev)
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{
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struct i2o_controller *c;
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c = pci_get_drvdata(pdev);
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i2o_iop_remove(c);
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i2o_pci_irq_disable(c);
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i2o_pci_free(c);
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pci_disable_device(pdev);
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printk(KERN_INFO "%s: Controller removed.\n", c->name);
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put_device(&c->device);
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};
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/* PCI driver for I2O controller */
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static struct pci_driver i2o_pci_driver = {
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.name = "PCI_I2O",
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.id_table = i2o_pci_ids,
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.probe = i2o_pci_probe,
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.remove = __devexit_p(i2o_pci_remove),
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};
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/**
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* i2o_pci_init - registers I2O PCI driver in PCI subsystem
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*
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* Returns > 0 on success or negative error code on failure.
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*/
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int __init i2o_pci_init(void)
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{
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return pci_register_driver(&i2o_pci_driver);
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};
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/**
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* i2o_pci_exit - unregisters I2O PCI driver from PCI subsystem
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*/
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void __exit i2o_pci_exit(void)
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{
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pci_unregister_driver(&i2o_pci_driver);
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};
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MODULE_DEVICE_TABLE(pci, i2o_pci_ids);
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