430 lines
8.8 KiB
C
430 lines
8.8 KiB
C
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/*
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* arch/arm/mach-spear6xx/spear6xx.c
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*
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* SPEAr6XX machines common source file
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*
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* Copyright (C) 2009 ST Microelectronics
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* Rajeev Kumar<rajeev-dlh.kumar@st.com>
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*
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* Copyright 2012 Stefan Roese <sr@denx.de>
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*
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* This file is licensed under the terms of the GNU General Public
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* License version 2. This program is licensed "as is" without any
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* warranty of any kind, whether express or implied.
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*/
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#include <linux/amba/pl08x.h>
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#include <linux/clk.h>
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#include <linux/err.h>
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#include <linux/of.h>
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#include <linux/of_address.h>
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#include <linux/of_platform.h>
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#include <linux/amba/pl080.h>
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#include <asm/mach/arch.h>
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#include <asm/mach/time.h>
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#include <asm/mach/map.h>
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#include "pl080.h"
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#include "generic.h"
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#include <mach/spear.h>
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#include <mach/misc_regs.h>
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/* dmac device registration */
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static struct pl08x_channel_data spear600_dma_info[] = {
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{
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.bus_id = "ssp1_rx",
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.min_signal = 0,
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.max_signal = 0,
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.muxval = 0,
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.periph_buses = PL08X_AHB1,
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}, {
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.bus_id = "ssp1_tx",
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.min_signal = 1,
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.max_signal = 1,
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.muxval = 0,
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.periph_buses = PL08X_AHB1,
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}, {
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.bus_id = "uart0_rx",
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.min_signal = 2,
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.max_signal = 2,
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.muxval = 0,
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.periph_buses = PL08X_AHB1,
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}, {
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.bus_id = "uart0_tx",
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.min_signal = 3,
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.max_signal = 3,
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.muxval = 0,
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.periph_buses = PL08X_AHB1,
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}, {
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.bus_id = "uart1_rx",
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.min_signal = 4,
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.max_signal = 4,
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.muxval = 0,
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.periph_buses = PL08X_AHB1,
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}, {
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.bus_id = "uart1_tx",
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.min_signal = 5,
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.max_signal = 5,
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.muxval = 0,
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.periph_buses = PL08X_AHB1,
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}, {
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.bus_id = "ssp2_rx",
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.min_signal = 6,
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.max_signal = 6,
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.muxval = 0,
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.periph_buses = PL08X_AHB2,
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}, {
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.bus_id = "ssp2_tx",
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.min_signal = 7,
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.max_signal = 7,
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.muxval = 0,
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.periph_buses = PL08X_AHB2,
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}, {
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.bus_id = "ssp0_rx",
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.min_signal = 8,
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.max_signal = 8,
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.muxval = 0,
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.periph_buses = PL08X_AHB1,
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}, {
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.bus_id = "ssp0_tx",
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.min_signal = 9,
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.max_signal = 9,
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.muxval = 0,
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.periph_buses = PL08X_AHB1,
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}, {
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.bus_id = "i2c_rx",
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.min_signal = 10,
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.max_signal = 10,
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.muxval = 0,
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.periph_buses = PL08X_AHB1,
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}, {
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.bus_id = "i2c_tx",
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.min_signal = 11,
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.max_signal = 11,
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.muxval = 0,
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.periph_buses = PL08X_AHB1,
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}, {
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.bus_id = "irda",
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.min_signal = 12,
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.max_signal = 12,
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.muxval = 0,
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.periph_buses = PL08X_AHB1,
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}, {
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.bus_id = "adc",
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.min_signal = 13,
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.max_signal = 13,
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.muxval = 0,
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.periph_buses = PL08X_AHB2,
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}, {
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.bus_id = "to_jpeg",
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.min_signal = 14,
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.max_signal = 14,
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.muxval = 0,
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.periph_buses = PL08X_AHB1,
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}, {
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.bus_id = "from_jpeg",
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.min_signal = 15,
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.max_signal = 15,
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.muxval = 0,
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.periph_buses = PL08X_AHB1,
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}, {
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.bus_id = "ras0_rx",
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.min_signal = 0,
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.max_signal = 0,
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.muxval = 1,
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.periph_buses = PL08X_AHB1,
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}, {
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.bus_id = "ras0_tx",
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.min_signal = 1,
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.max_signal = 1,
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.muxval = 1,
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.periph_buses = PL08X_AHB1,
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}, {
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.bus_id = "ras1_rx",
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.min_signal = 2,
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.max_signal = 2,
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.muxval = 1,
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.periph_buses = PL08X_AHB1,
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}, {
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.bus_id = "ras1_tx",
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.min_signal = 3,
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.max_signal = 3,
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.muxval = 1,
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.periph_buses = PL08X_AHB1,
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}, {
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.bus_id = "ras2_rx",
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.min_signal = 4,
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.max_signal = 4,
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.muxval = 1,
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.periph_buses = PL08X_AHB1,
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}, {
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.bus_id = "ras2_tx",
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.min_signal = 5,
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.max_signal = 5,
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.muxval = 1,
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.periph_buses = PL08X_AHB1,
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}, {
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.bus_id = "ras3_rx",
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.min_signal = 6,
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.max_signal = 6,
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.muxval = 1,
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.periph_buses = PL08X_AHB1,
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}, {
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.bus_id = "ras3_tx",
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.min_signal = 7,
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.max_signal = 7,
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.muxval = 1,
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.periph_buses = PL08X_AHB1,
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}, {
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.bus_id = "ras4_rx",
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.min_signal = 8,
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.max_signal = 8,
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.muxval = 1,
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.periph_buses = PL08X_AHB1,
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}, {
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.bus_id = "ras4_tx",
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.min_signal = 9,
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.max_signal = 9,
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.muxval = 1,
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.periph_buses = PL08X_AHB1,
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}, {
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.bus_id = "ras5_rx",
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.min_signal = 10,
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.max_signal = 10,
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.muxval = 1,
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.periph_buses = PL08X_AHB1,
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}, {
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.bus_id = "ras5_tx",
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.min_signal = 11,
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.max_signal = 11,
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.muxval = 1,
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.periph_buses = PL08X_AHB1,
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}, {
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.bus_id = "ras6_rx",
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.min_signal = 12,
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.max_signal = 12,
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.muxval = 1,
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.periph_buses = PL08X_AHB1,
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}, {
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.bus_id = "ras6_tx",
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.min_signal = 13,
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.max_signal = 13,
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.muxval = 1,
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.periph_buses = PL08X_AHB1,
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}, {
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.bus_id = "ras7_rx",
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.min_signal = 14,
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.max_signal = 14,
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.muxval = 1,
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.periph_buses = PL08X_AHB1,
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}, {
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.bus_id = "ras7_tx",
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.min_signal = 15,
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.max_signal = 15,
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.muxval = 1,
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.periph_buses = PL08X_AHB1,
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}, {
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.bus_id = "ext0_rx",
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.min_signal = 0,
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.max_signal = 0,
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.muxval = 2,
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.periph_buses = PL08X_AHB2,
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}, {
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.bus_id = "ext0_tx",
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.min_signal = 1,
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.max_signal = 1,
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.muxval = 2,
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.periph_buses = PL08X_AHB2,
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}, {
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.bus_id = "ext1_rx",
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.min_signal = 2,
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.max_signal = 2,
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.muxval = 2,
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.periph_buses = PL08X_AHB2,
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}, {
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.bus_id = "ext1_tx",
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.min_signal = 3,
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.max_signal = 3,
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.muxval = 2,
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.periph_buses = PL08X_AHB2,
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}, {
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.bus_id = "ext2_rx",
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.min_signal = 4,
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.max_signal = 4,
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.muxval = 2,
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.periph_buses = PL08X_AHB2,
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}, {
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.bus_id = "ext2_tx",
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.min_signal = 5,
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.max_signal = 5,
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.muxval = 2,
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.periph_buses = PL08X_AHB2,
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}, {
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.bus_id = "ext3_rx",
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.min_signal = 6,
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.max_signal = 6,
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.muxval = 2,
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.periph_buses = PL08X_AHB2,
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}, {
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.bus_id = "ext3_tx",
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.min_signal = 7,
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.max_signal = 7,
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.muxval = 2,
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.periph_buses = PL08X_AHB2,
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}, {
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.bus_id = "ext4_rx",
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.min_signal = 8,
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.max_signal = 8,
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.muxval = 2,
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.periph_buses = PL08X_AHB2,
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}, {
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.bus_id = "ext4_tx",
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.min_signal = 9,
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.max_signal = 9,
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.muxval = 2,
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.periph_buses = PL08X_AHB2,
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}, {
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.bus_id = "ext5_rx",
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.min_signal = 10,
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.max_signal = 10,
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.muxval = 2,
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.periph_buses = PL08X_AHB2,
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}, {
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.bus_id = "ext5_tx",
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.min_signal = 11,
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.max_signal = 11,
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.muxval = 2,
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.periph_buses = PL08X_AHB2,
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}, {
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.bus_id = "ext6_rx",
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.min_signal = 12,
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.max_signal = 12,
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.muxval = 2,
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.periph_buses = PL08X_AHB2,
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}, {
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.bus_id = "ext6_tx",
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.min_signal = 13,
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.max_signal = 13,
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.muxval = 2,
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.periph_buses = PL08X_AHB2,
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}, {
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.bus_id = "ext7_rx",
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.min_signal = 14,
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.max_signal = 14,
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.muxval = 2,
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.periph_buses = PL08X_AHB2,
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}, {
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.bus_id = "ext7_tx",
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.min_signal = 15,
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.max_signal = 15,
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.muxval = 2,
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.periph_buses = PL08X_AHB2,
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},
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};
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static struct pl08x_platform_data spear6xx_pl080_plat_data = {
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.memcpy_channel = {
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.bus_id = "memcpy",
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.cctl_memcpy =
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(PL080_BSIZE_16 << PL080_CONTROL_SB_SIZE_SHIFT | \
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PL080_BSIZE_16 << PL080_CONTROL_DB_SIZE_SHIFT | \
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PL080_WIDTH_32BIT << PL080_CONTROL_SWIDTH_SHIFT | \
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PL080_WIDTH_32BIT << PL080_CONTROL_DWIDTH_SHIFT | \
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PL080_CONTROL_PROT_BUFF | PL080_CONTROL_PROT_CACHE | \
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PL080_CONTROL_PROT_SYS),
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},
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.lli_buses = PL08X_AHB1,
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.mem_buses = PL08X_AHB1,
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.get_xfer_signal = pl080_get_signal,
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.put_xfer_signal = pl080_put_signal,
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.slave_channels = spear600_dma_info,
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.num_slave_channels = ARRAY_SIZE(spear600_dma_info),
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};
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/*
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* Following will create 16MB static virtual/physical mappings
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* PHYSICAL VIRTUAL
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* 0xF0000000 0xF0000000
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* 0xF1000000 0xF1000000
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* 0xD0000000 0xFD000000
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* 0xFC000000 0xFC000000
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*/
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struct map_desc spear6xx_io_desc[] __initdata = {
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{
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.virtual = (unsigned long)VA_SPEAR6XX_ML_CPU_BASE,
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.pfn = __phys_to_pfn(SPEAR_ICM3_ML1_2_BASE),
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.length = 2 * SZ_16M,
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.type = MT_DEVICE
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}, {
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.virtual = (unsigned long)VA_SPEAR_ICM1_2_BASE,
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.pfn = __phys_to_pfn(SPEAR_ICM1_2_BASE),
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.length = SZ_16M,
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.type = MT_DEVICE
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}, {
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.virtual = (unsigned long)VA_SPEAR_ICM3_SMI_CTRL_BASE,
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.pfn = __phys_to_pfn(SPEAR_ICM3_SMI_CTRL_BASE),
|
||
|
|
.length = SZ_16M,
|
||
|
|
.type = MT_DEVICE
|
||
|
|
},
|
||
|
|
};
|
||
|
|
|
||
|
|
/* This will create static memory mapping for selected devices */
|
||
|
|
void __init spear6xx_map_io(void)
|
||
|
|
{
|
||
|
|
iotable_init(spear6xx_io_desc, ARRAY_SIZE(spear6xx_io_desc));
|
||
|
|
}
|
||
|
|
|
||
|
|
void __init spear6xx_timer_init(void)
|
||
|
|
{
|
||
|
|
char pclk_name[] = "pll3_clk";
|
||
|
|
struct clk *gpt_clk, *pclk;
|
||
|
|
|
||
|
|
spear6xx_clk_init(MISC_BASE);
|
||
|
|
|
||
|
|
/* get the system timer clock */
|
||
|
|
gpt_clk = clk_get_sys("gpt0", NULL);
|
||
|
|
if (IS_ERR(gpt_clk)) {
|
||
|
|
pr_err("%s:couldn't get clk for gpt\n", __func__);
|
||
|
|
BUG();
|
||
|
|
}
|
||
|
|
|
||
|
|
/* get the suitable parent clock for timer*/
|
||
|
|
pclk = clk_get(NULL, pclk_name);
|
||
|
|
if (IS_ERR(pclk)) {
|
||
|
|
pr_err("%s:couldn't get %s as parent for gpt\n",
|
||
|
|
__func__, pclk_name);
|
||
|
|
BUG();
|
||
|
|
}
|
||
|
|
|
||
|
|
clk_set_parent(gpt_clk, pclk);
|
||
|
|
clk_put(gpt_clk);
|
||
|
|
clk_put(pclk);
|
||
|
|
|
||
|
|
spear_setup_of_timer();
|
||
|
|
}
|
||
|
|
|
||
|
|
/* Add auxdata to pass platform data */
|
||
|
|
struct of_dev_auxdata spear6xx_auxdata_lookup[] __initdata = {
|
||
|
|
OF_DEV_AUXDATA("arm,pl080", SPEAR_ICM3_DMA_BASE, NULL,
|
||
|
|
&spear6xx_pl080_plat_data),
|
||
|
|
{}
|
||
|
|
};
|
||
|
|
|
||
|
|
static void __init spear600_dt_init(void)
|
||
|
|
{
|
||
|
|
of_platform_populate(NULL, of_default_bus_match_table,
|
||
|
|
spear6xx_auxdata_lookup, NULL);
|
||
|
|
}
|
||
|
|
|
||
|
|
static const char *spear600_dt_board_compat[] = {
|
||
|
|
"st,spear600",
|
||
|
|
NULL
|
||
|
|
};
|
||
|
|
|
||
|
|
DT_MACHINE_START(SPEAR600_DT, "ST SPEAr600 (Flattened Device Tree)")
|
||
|
|
.map_io = spear6xx_map_io,
|
||
|
|
.init_time = spear6xx_timer_init,
|
||
|
|
.init_machine = spear600_dt_init,
|
||
|
|
.restart = spear_restart,
|
||
|
|
.dt_compat = spear600_dt_board_compat,
|
||
|
|
MACHINE_END
|