552 lines
13 KiB
ArmAsm
552 lines
13 KiB
ArmAsm
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/*
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* linux/arch/m32r/kernel/entry.S
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*
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* Copyright (c) 2001, 2002 Hirokazu Takata, Hitoshi Yamamoto, H. Kondo
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* Copyright (c) 2003 Hitoshi Yamamoto
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* Copyright (c) 2004 Hirokazu Takata <takata at linux-m32r.org>
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*
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* Taken from i386 version.
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* Copyright (C) 1991, 1992 Linus Torvalds
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*/
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/*
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* entry.S contains the system-call and fault low-level handling routines.
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* This also contains the timer-interrupt handler, as well as all interrupts
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* and faults that can result in a task-switch.
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*
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* NOTE: This code handles signal-recognition, which happens every time
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* after a timer-interrupt and after each system call.
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*
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* Stack layout in 'ret_from_system_call':
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* ptrace needs to have all regs on the stack.
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* if the order here is changed, it needs to be
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* updated in fork.c:copy_thread, signal.c:do_signal,
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* ptrace.c and ptrace.h
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*
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* M32R/M32Rx/M32R2
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* @(sp) - r4
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* @(0x04,sp) - r5
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* @(0x08,sp) - r6
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* @(0x0c,sp) - *pt_regs
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* @(0x10,sp) - r0
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* @(0x14,sp) - r1
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* @(0x18,sp) - r2
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* @(0x1c,sp) - r3
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* @(0x20,sp) - r7
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* @(0x24,sp) - r8
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* @(0x28,sp) - r9
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* @(0x2c,sp) - r10
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* @(0x30,sp) - r11
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* @(0x34,sp) - r12
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* @(0x38,sp) - syscall_nr
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* @(0x3c,sp) - acc0h
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* @(0x40,sp) - acc0l
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* @(0x44,sp) - acc1h ; ISA_DSP_LEVEL2 only
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* @(0x48,sp) - acc1l ; ISA_DSP_LEVEL2 only
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* @(0x4c,sp) - psw
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* @(0x50,sp) - bpc
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* @(0x54,sp) - bbpsw
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* @(0x58,sp) - bbpc
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* @(0x5c,sp) - spu (cr3)
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* @(0x60,sp) - fp (r13)
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* @(0x64,sp) - lr (r14)
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* @(0x68,sp) - spi (cr2)
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* @(0x6c,sp) - orig_r0
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*/
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#include <linux/linkage.h>
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#include <asm/irq.h>
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#include <asm/unistd.h>
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#include <asm/assembler.h>
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#include <asm/thread_info.h>
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#include <asm/errno.h>
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#include <asm/segment.h>
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#include <asm/smp.h>
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#include <asm/page.h>
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#include <asm/m32r.h>
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#include <asm/mmu_context.h>
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#if !defined(CONFIG_MMU)
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#define sys_madvise sys_ni_syscall
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#define sys_readahead sys_ni_syscall
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#define sys_mprotect sys_ni_syscall
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#define sys_msync sys_ni_syscall
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#define sys_mlock sys_ni_syscall
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#define sys_munlock sys_ni_syscall
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#define sys_mlockall sys_ni_syscall
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#define sys_munlockall sys_ni_syscall
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#define sys_mremap sys_ni_syscall
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#define sys_mincore sys_ni_syscall
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#define sys_remap_file_pages sys_ni_syscall
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#endif /* CONFIG_MMU */
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#define R4(reg) @reg
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#define R5(reg) @(0x04,reg)
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#define R6(reg) @(0x08,reg)
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#define PTREGS(reg) @(0x0C,reg)
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#define R0(reg) @(0x10,reg)
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#define R1(reg) @(0x14,reg)
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#define R2(reg) @(0x18,reg)
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#define R3(reg) @(0x1C,reg)
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#define R7(reg) @(0x20,reg)
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#define R8(reg) @(0x24,reg)
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#define R9(reg) @(0x28,reg)
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#define R10(reg) @(0x2C,reg)
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#define R11(reg) @(0x30,reg)
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#define R12(reg) @(0x34,reg)
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#define SYSCALL_NR(reg) @(0x38,reg)
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#define ACC0H(reg) @(0x3C,reg)
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#define ACC0L(reg) @(0x40,reg)
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#define ACC1H(reg) @(0x44,reg)
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#define ACC1L(reg) @(0x48,reg)
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#define PSW(reg) @(0x4C,reg)
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#define BPC(reg) @(0x50,reg)
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#define BBPSW(reg) @(0x54,reg)
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#define BBPC(reg) @(0x58,reg)
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#define SPU(reg) @(0x5C,reg)
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#define FP(reg) @(0x60,reg) /* FP = R13 */
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#define LR(reg) @(0x64,reg)
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#define SP(reg) @(0x68,reg)
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#define ORIG_R0(reg) @(0x6C,reg)
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#define nr_syscalls ((syscall_table_size)/4)
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#ifdef CONFIG_PREEMPT
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#define preempt_stop(x) DISABLE_INTERRUPTS(x)
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#else
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#define preempt_stop(x)
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#define resume_kernel restore_all
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#endif
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/* how to get the thread information struct from ASM */
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#define GET_THREAD_INFO(reg) GET_THREAD_INFO reg
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.macro GET_THREAD_INFO reg
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ldi \reg, #-THREAD_SIZE
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and \reg, sp
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.endm
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ENTRY(ret_from_kernel_thread)
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pop r0
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bl schedule_tail
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GET_THREAD_INFO(r8)
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ld r0, R0(r8)
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ld r1, R1(r8)
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jl r1
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bra syscall_exit
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ENTRY(ret_from_fork)
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pop r0
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bl schedule_tail
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GET_THREAD_INFO(r8)
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bra syscall_exit
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/*
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* Return to user mode is not as complex as all this looks,
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* but we want the default path for a system call return to
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* go as quickly as possible which is why some of this is
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* less clear than it otherwise should be.
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*/
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; userspace resumption stub bypassing syscall exit tracing
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ALIGN
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ret_from_exception:
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preempt_stop(r4)
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ret_from_intr:
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ld r4, PSW(sp)
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#ifdef CONFIG_ISA_M32R2
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and3 r4, r4, #0x8800 ; check BSM and BPM bits
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#else
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and3 r4, r4, #0x8000 ; check BSM bit
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#endif
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beqz r4, resume_kernel
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resume_userspace:
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DISABLE_INTERRUPTS(r4) ; make sure we don't miss an interrupt
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; setting need_resched or sigpending
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; between sampling and the iret
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GET_THREAD_INFO(r8)
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ld r9, @(TI_FLAGS, r8)
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and3 r4, r9, #_TIF_WORK_MASK ; is there any work to be done on
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; int/exception return?
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bnez r4, work_pending
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bra restore_all
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#ifdef CONFIG_PREEMPT
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ENTRY(resume_kernel)
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GET_THREAD_INFO(r8)
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ld r9, @(TI_PRE_COUNT, r8) ; non-zero preempt_count ?
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bnez r9, restore_all
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need_resched:
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ld r9, @(TI_FLAGS, r8) ; need_resched set ?
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and3 r4, r9, #_TIF_NEED_RESCHED
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beqz r4, restore_all
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ld r4, PSW(sp) ; interrupts off (exception path) ?
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and3 r4, r4, #0x4000
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beqz r4, restore_all
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bl preempt_schedule_irq
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bra need_resched
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#endif
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; system call handler stub
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ENTRY(system_call)
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SWITCH_TO_KERNEL_STACK
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SAVE_ALL
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ENABLE_INTERRUPTS(r4) ; Enable interrupt
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st sp, PTREGS(sp) ; implicit pt_regs parameter
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cmpui r7, #NR_syscalls
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bnc syscall_badsys
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st r7, SYSCALL_NR(sp) ; syscall_nr
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; system call tracing in operation
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GET_THREAD_INFO(r8)
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ld r9, @(TI_FLAGS, r8)
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and3 r4, r9, #_TIF_SYSCALL_TRACE
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bnez r4, syscall_trace_entry
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syscall_call:
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slli r7, #2 ; table jump for the system call
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LDIMM (r4, sys_call_table)
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add r7, r4
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ld r7, @r7
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jl r7 ; execute system call
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st r0, R0(sp) ; save the return value
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syscall_exit:
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DISABLE_INTERRUPTS(r4) ; make sure we don't miss an interrupt
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; setting need_resched or sigpending
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; between sampling and the iret
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ld r9, @(TI_FLAGS, r8)
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and3 r4, r9, #_TIF_ALLWORK_MASK ; current->work
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bnez r4, syscall_exit_work
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restore_all:
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RESTORE_ALL
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# perform work that needs to be done immediately before resumption
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# r9 : flags
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ALIGN
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work_pending:
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and3 r4, r9, #_TIF_NEED_RESCHED
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beqz r4, work_notifysig
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work_resched:
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bl schedule
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DISABLE_INTERRUPTS(r4) ; make sure we don't miss an interrupt
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; setting need_resched or sigpending
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; between sampling and the iret
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ld r9, @(TI_FLAGS, r8)
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and3 r4, r9, #_TIF_WORK_MASK ; is there any work to be done other
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; than syscall tracing?
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beqz r4, restore_all
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and3 r4, r4, #_TIF_NEED_RESCHED
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bnez r4, work_resched
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work_notifysig: ; deal with pending signals and
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; notify-resume requests
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mv r0, sp ; arg1 : struct pt_regs *regs
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mv r1, r9 ; arg2 : __u32 thread_info_flags
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bl do_notify_resume
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bra resume_userspace
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; perform syscall exit tracing
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ALIGN
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syscall_trace_entry:
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ldi r4, #-ENOSYS
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st r4, R0(sp)
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bl do_syscall_trace
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ld r0, ORIG_R0(sp)
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ld r1, R1(sp)
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ld r2, R2(sp)
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ld r3, R3(sp)
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ld r4, R4(sp)
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ld r5, R5(sp)
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ld r6, R6(sp)
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ld r7, SYSCALL_NR(sp)
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cmpui r7, #NR_syscalls
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bc syscall_call
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bra syscall_exit
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; perform syscall exit tracing
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ALIGN
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syscall_exit_work:
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ld r9, @(TI_FLAGS, r8)
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and3 r4, r9, #_TIF_SYSCALL_TRACE
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beqz r4, work_pending
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ENABLE_INTERRUPTS(r4) ; could let do_syscall_trace() call
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; schedule() instead
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bl do_syscall_trace
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bra resume_userspace
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ALIGN
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syscall_fault:
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SAVE_ALL
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GET_THREAD_INFO(r8)
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ldi r4, #-EFAULT
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st r4, R0(sp)
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bra resume_userspace
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ALIGN
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syscall_badsys:
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ldi r4, #-ENOSYS
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st r4, R0(sp)
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bra resume_userspace
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.global eit_vector
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.equ ei_vec_table, eit_vector + 0x0200
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/*
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* EI handler routine
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*/
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ENTRY(ei_handler)
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#if defined(CONFIG_CHIP_M32700)
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; WORKAROUND: force to clear SM bit and use the kernel stack (SPI).
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SWITCH_TO_KERNEL_STACK
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#endif
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SAVE_ALL
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mv r1, sp ; arg1(regs)
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; get ICU status
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seth r0, #shigh(M32R_ICU_ISTS_ADDR)
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ld r0, @(low(M32R_ICU_ISTS_ADDR),r0)
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push r0
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#if defined(CONFIG_SMP)
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/*
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* If IRQ == 0 --> Nothing to do, Not write IMASK
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* If IRQ == IPI --> Do IPI handler, Not write IMASK
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* If IRQ != 0, IPI --> Do do_IRQ(), Write IMASK
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*/
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slli r0, #4
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srli r0, #24 ; r0(irq_num<<2)
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;; IRQ exist check
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#if defined(CONFIG_CHIP_M32700)
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/* WORKAROUND: IMASK bug M32700-TS1, TS2 chip. */
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bnez r0, 0f
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ld24 r14, #0x00070000
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seth r0, #shigh(M32R_ICU_IMASK_ADDR)
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st r14, @(low(M32R_ICU_IMASK_ADDR),r0)
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bra 1f
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.fillinsn
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0:
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#endif /* CONFIG_CHIP_M32700 */
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beqz r0, 1f ; if (!irq_num) goto exit
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;; IPI check
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cmpi r0, #(M32R_IRQ_IPI0<<2) ; ISN < IPI0 check
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bc 2f
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cmpi r0, #((M32R_IRQ_IPI7+1)<<2) ; ISN > IPI7 check
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bnc 2f
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LDIMM (r2, ei_vec_table)
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add r2, r0
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ld r2, @r2
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beqz r2, 1f ; if (no IPI handler) goto exit
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mv r0, r1 ; arg0(regs)
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jl r2
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.fillinsn
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1:
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addi sp, #4
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bra restore_all
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.fillinsn
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2:
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srli r0, #2
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#else /* not CONFIG_SMP */
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srli r0, #22 ; r0(irq)
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#endif /* not CONFIG_SMP */
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#if defined(CONFIG_PLAT_HAS_INT1ICU)
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add3 r2, r0, #-(M32R_IRQ_INT1) ; INT1# interrupt
|
||
|
|
bnez r2, 3f
|
||
|
|
seth r0, #shigh(M32R_INT1ICU_ISTS)
|
||
|
|
lduh r0, @(low(M32R_INT1ICU_ISTS),r0) ; bit10-6 : ISN
|
||
|
|
slli r0, #21
|
||
|
|
srli r0, #27 ; ISN
|
||
|
|
addi r0, #(M32R_INT1ICU_IRQ_BASE)
|
||
|
|
bra check_end
|
||
|
|
.fillinsn
|
||
|
|
3:
|
||
|
|
#endif /* CONFIG_PLAT_HAS_INT1ICU */
|
||
|
|
#if defined(CONFIG_PLAT_HAS_INT0ICU)
|
||
|
|
add3 r2, r0, #-(M32R_IRQ_INT0) ; INT0# interrupt
|
||
|
|
bnez r2, 4f
|
||
|
|
seth r0, #shigh(M32R_INT0ICU_ISTS)
|
||
|
|
lduh r0, @(low(M32R_INT0ICU_ISTS),r0) ; bit10-6 : ISN
|
||
|
|
slli r0, #21
|
||
|
|
srli r0, #27 ; ISN
|
||
|
|
add3 r0, r0, #(M32R_INT0ICU_IRQ_BASE)
|
||
|
|
bra check_end
|
||
|
|
.fillinsn
|
||
|
|
4:
|
||
|
|
#endif /* CONFIG_PLAT_HAS_INT0ICU */
|
||
|
|
#if defined(CONFIG_PLAT_HAS_INT2ICU)
|
||
|
|
add3 r2, r0, #-(M32R_IRQ_INT2) ; INT2# interrupt
|
||
|
|
bnez r2, 5f
|
||
|
|
seth r0, #shigh(M32R_INT2ICU_ISTS)
|
||
|
|
lduh r0, @(low(M32R_INT2ICU_ISTS),r0) ; bit10-6 : ISN
|
||
|
|
slli r0, #21
|
||
|
|
srli r0, #27 ; ISN
|
||
|
|
add3 r0, r0, #(M32R_INT2ICU_IRQ_BASE)
|
||
|
|
; bra check_end
|
||
|
|
.fillinsn
|
||
|
|
5:
|
||
|
|
#endif /* CONFIG_PLAT_HAS_INT2ICU */
|
||
|
|
|
||
|
|
check_end:
|
||
|
|
bl do_IRQ
|
||
|
|
pop r14
|
||
|
|
seth r0, #shigh(M32R_ICU_IMASK_ADDR)
|
||
|
|
st r14, @(low(M32R_ICU_IMASK_ADDR),r0)
|
||
|
|
bra ret_from_intr
|
||
|
|
|
||
|
|
/*
|
||
|
|
* Default EIT handler
|
||
|
|
*/
|
||
|
|
ALIGN
|
||
|
|
int_msg:
|
||
|
|
.asciz "Unknown interrupt\n"
|
||
|
|
.byte 0
|
||
|
|
|
||
|
|
ENTRY(default_eit_handler)
|
||
|
|
push r0
|
||
|
|
mvfc r0, psw
|
||
|
|
push r1
|
||
|
|
push r2
|
||
|
|
push r3
|
||
|
|
push r0
|
||
|
|
LDIMM (r0, __KERNEL_DS)
|
||
|
|
mv r0, r1
|
||
|
|
mv r0, r2
|
||
|
|
LDIMM (r0, int_msg)
|
||
|
|
bl printk
|
||
|
|
pop r0
|
||
|
|
pop r3
|
||
|
|
pop r2
|
||
|
|
pop r1
|
||
|
|
mvtc r0, psw
|
||
|
|
pop r0
|
||
|
|
infinit:
|
||
|
|
bra infinit
|
||
|
|
|
||
|
|
#ifdef CONFIG_MMU
|
||
|
|
/*
|
||
|
|
* Access Exception handler
|
||
|
|
*/
|
||
|
|
ENTRY(ace_handler)
|
||
|
|
SWITCH_TO_KERNEL_STACK
|
||
|
|
SAVE_ALL
|
||
|
|
|
||
|
|
seth r2, #shigh(MMU_REG_BASE) /* Check status register */
|
||
|
|
ld r4, @(low(MESTS_offset),r2)
|
||
|
|
st r4, @(low(MESTS_offset),r2)
|
||
|
|
srl3 r1, r4, #4
|
||
|
|
#ifdef CONFIG_CHIP_M32700
|
||
|
|
and3 r1, r1, #0x0000ffff
|
||
|
|
; WORKAROUND: ignore TME bit for the M32700(TS1).
|
||
|
|
#endif /* CONFIG_CHIP_M32700 */
|
||
|
|
beqz r1, inst
|
||
|
|
oprand:
|
||
|
|
ld r2, @(low(MDEVA_offset),r2) ; set address
|
||
|
|
srli r1, #1
|
||
|
|
bra 1f
|
||
|
|
inst:
|
||
|
|
and3 r1, r4, #2
|
||
|
|
srli r1, #1
|
||
|
|
or3 r1, r1, #8
|
||
|
|
mvfc r2, bpc ; set address
|
||
|
|
.fillinsn
|
||
|
|
1:
|
||
|
|
mvfc r3, psw
|
||
|
|
mv r0, sp
|
||
|
|
and3 r3, r3, 0x800
|
||
|
|
srli r3, #9
|
||
|
|
or r1, r3
|
||
|
|
/*
|
||
|
|
* do_page_fault():
|
||
|
|
* r0 : struct pt_regs *regs
|
||
|
|
* r1 : unsigned long error-code
|
||
|
|
* r2 : unsigned long address
|
||
|
|
* error-code:
|
||
|
|
* +------+------+------+------+
|
||
|
|
* | bit3 | bit2 | bit1 | bit0 |
|
||
|
|
* +------+------+------+------+
|
||
|
|
* bit 3 == 0:means data, 1:means instruction
|
||
|
|
* bit 2 == 0:means kernel, 1:means user-mode
|
||
|
|
* bit 1 == 0:means read, 1:means write
|
||
|
|
* bit 0 == 0:means no page found 1:means protection fault
|
||
|
|
*
|
||
|
|
*/
|
||
|
|
bl do_page_fault
|
||
|
|
bra ret_from_intr
|
||
|
|
#endif /* CONFIG_MMU */
|
||
|
|
|
||
|
|
|
||
|
|
ENTRY(alignment_check)
|
||
|
|
/* void alignment_check(int error_code) */
|
||
|
|
SWITCH_TO_KERNEL_STACK
|
||
|
|
SAVE_ALL
|
||
|
|
ldi r1, #0x30 ; error_code
|
||
|
|
mv r0, sp ; pt_regs
|
||
|
|
bl do_alignment_check
|
||
|
|
error_code:
|
||
|
|
bra ret_from_exception
|
||
|
|
|
||
|
|
ENTRY(rie_handler)
|
||
|
|
/* void rie_handler(int error_code) */
|
||
|
|
SWITCH_TO_KERNEL_STACK
|
||
|
|
SAVE_ALL
|
||
|
|
ldi r1, #0x20 ; error_code
|
||
|
|
mv r0, sp ; pt_regs
|
||
|
|
bl do_rie_handler
|
||
|
|
bra error_code
|
||
|
|
|
||
|
|
ENTRY(pie_handler)
|
||
|
|
/* void pie_handler(int error_code) */
|
||
|
|
SWITCH_TO_KERNEL_STACK
|
||
|
|
SAVE_ALL
|
||
|
|
ldi r1, #0 ; error_code ; FIXME
|
||
|
|
mv r0, sp ; pt_regs
|
||
|
|
bl do_pie_handler
|
||
|
|
bra error_code
|
||
|
|
|
||
|
|
ENTRY(debug_trap)
|
||
|
|
/* void debug_trap(void) */
|
||
|
|
.global withdraw_debug_trap
|
||
|
|
SWITCH_TO_KERNEL_STACK
|
||
|
|
SAVE_ALL
|
||
|
|
mv r0, sp ; pt_regs
|
||
|
|
bl withdraw_debug_trap
|
||
|
|
ldi r1, #0 ; error_code
|
||
|
|
mv r0, sp ; pt_regs
|
||
|
|
bl do_debug_trap
|
||
|
|
bra error_code
|
||
|
|
|
||
|
|
ENTRY(ill_trap)
|
||
|
|
/* void ill_trap(void) */
|
||
|
|
SWITCH_TO_KERNEL_STACK
|
||
|
|
SAVE_ALL
|
||
|
|
ldi r1, #0 ; error_code ; FIXME
|
||
|
|
mv r0, sp ; pt_regs
|
||
|
|
bl do_ill_trap
|
||
|
|
bra error_code
|
||
|
|
|
||
|
|
ENTRY(cache_flushing_handler)
|
||
|
|
/* void _flush_cache_all(void); */
|
||
|
|
.global _flush_cache_all
|
||
|
|
SWITCH_TO_KERNEL_STACK
|
||
|
|
push r0
|
||
|
|
push r1
|
||
|
|
push r2
|
||
|
|
push r3
|
||
|
|
push r4
|
||
|
|
push r5
|
||
|
|
push r6
|
||
|
|
push r7
|
||
|
|
push lr
|
||
|
|
bl _flush_cache_all
|
||
|
|
pop lr
|
||
|
|
pop r7
|
||
|
|
pop r6
|
||
|
|
pop r5
|
||
|
|
pop r4
|
||
|
|
pop r3
|
||
|
|
pop r2
|
||
|
|
pop r1
|
||
|
|
pop r0
|
||
|
|
rte
|
||
|
|
|
||
|
|
.section .rodata,"a"
|
||
|
|
#include "syscall_table.S"
|
||
|
|
|
||
|
|
syscall_table_size=(.-sys_call_table)
|