542 lines
13 KiB
C
542 lines
13 KiB
C
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/*
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* Copyright 2012 Freescale Semiconductor, Inc.
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*
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* The code contained herein is licensed under the GNU General Public
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* License. You may obtain a copy of the GNU General Public License
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* Version 2 or later at the following locations:
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*
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* http://www.opensource.org/licenses/gpl-license.html
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* http://www.gnu.org/copyleft/gpl.html
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*/
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#include <linux/err.h>
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#include <linux/init.h>
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#include <linux/io.h>
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#include <linux/module.h>
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#include <linux/of.h>
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#include <linux/of_address.h>
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#include <linux/pinctrl/machine.h>
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#include <linux/pinctrl/pinconf.h>
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#include <linux/pinctrl/pinctrl.h>
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#include <linux/pinctrl/pinmux.h>
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#include <linux/platform_device.h>
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#include <linux/slab.h>
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#include "../core.h"
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#include "pinctrl-mxs.h"
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#define SUFFIX_LEN 4
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struct mxs_pinctrl_data {
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struct device *dev;
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struct pinctrl_dev *pctl;
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void __iomem *base;
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struct mxs_pinctrl_soc_data *soc;
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};
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static int mxs_get_groups_count(struct pinctrl_dev *pctldev)
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{
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struct mxs_pinctrl_data *d = pinctrl_dev_get_drvdata(pctldev);
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return d->soc->ngroups;
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}
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static const char *mxs_get_group_name(struct pinctrl_dev *pctldev,
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unsigned group)
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{
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struct mxs_pinctrl_data *d = pinctrl_dev_get_drvdata(pctldev);
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return d->soc->groups[group].name;
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}
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static int mxs_get_group_pins(struct pinctrl_dev *pctldev, unsigned group,
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const unsigned **pins, unsigned *num_pins)
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{
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struct mxs_pinctrl_data *d = pinctrl_dev_get_drvdata(pctldev);
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*pins = d->soc->groups[group].pins;
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*num_pins = d->soc->groups[group].npins;
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return 0;
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}
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static void mxs_pin_dbg_show(struct pinctrl_dev *pctldev, struct seq_file *s,
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unsigned offset)
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{
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seq_printf(s, " %s", dev_name(pctldev->dev));
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}
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static int mxs_dt_node_to_map(struct pinctrl_dev *pctldev,
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struct device_node *np,
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struct pinctrl_map **map, unsigned *num_maps)
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{
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struct pinctrl_map *new_map;
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char *group = NULL;
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unsigned new_num = 1;
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unsigned long config = 0;
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unsigned long *pconfig;
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int length = strlen(np->name) + SUFFIX_LEN;
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bool purecfg = false;
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u32 val, reg;
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int ret, i = 0;
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/* Check for pin config node which has no 'reg' property */
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if (of_property_read_u32(np, "reg", ®))
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purecfg = true;
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ret = of_property_read_u32(np, "fsl,drive-strength", &val);
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if (!ret)
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config = val | MA_PRESENT;
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ret = of_property_read_u32(np, "fsl,voltage", &val);
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if (!ret)
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config |= val << VOL_SHIFT | VOL_PRESENT;
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ret = of_property_read_u32(np, "fsl,pull-up", &val);
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if (!ret)
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config |= val << PULL_SHIFT | PULL_PRESENT;
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/* Check for group node which has both mux and config settings */
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if (!purecfg && config)
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new_num = 2;
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new_map = kzalloc(sizeof(*new_map) * new_num, GFP_KERNEL);
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if (!new_map)
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return -ENOMEM;
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if (!purecfg) {
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new_map[i].type = PIN_MAP_TYPE_MUX_GROUP;
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new_map[i].data.mux.function = np->name;
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/* Compose group name */
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group = kzalloc(length, GFP_KERNEL);
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if (!group) {
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ret = -ENOMEM;
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goto free;
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}
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snprintf(group, length, "%s.%d", np->name, reg);
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new_map[i].data.mux.group = group;
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i++;
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}
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if (config) {
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pconfig = kmemdup(&config, sizeof(config), GFP_KERNEL);
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if (!pconfig) {
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ret = -ENOMEM;
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goto free_group;
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}
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new_map[i].type = PIN_MAP_TYPE_CONFIGS_GROUP;
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new_map[i].data.configs.group_or_pin = purecfg ? np->name :
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group;
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new_map[i].data.configs.configs = pconfig;
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new_map[i].data.configs.num_configs = 1;
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}
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*map = new_map;
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*num_maps = new_num;
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return 0;
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free_group:
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if (!purecfg)
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kfree(group);
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free:
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kfree(new_map);
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return ret;
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}
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static void mxs_dt_free_map(struct pinctrl_dev *pctldev,
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struct pinctrl_map *map, unsigned num_maps)
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{
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u32 i;
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for (i = 0; i < num_maps; i++) {
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if (map[i].type == PIN_MAP_TYPE_MUX_GROUP)
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kfree(map[i].data.mux.group);
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if (map[i].type == PIN_MAP_TYPE_CONFIGS_GROUP)
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kfree(map[i].data.configs.configs);
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}
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kfree(map);
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}
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static const struct pinctrl_ops mxs_pinctrl_ops = {
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.get_groups_count = mxs_get_groups_count,
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.get_group_name = mxs_get_group_name,
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.get_group_pins = mxs_get_group_pins,
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.pin_dbg_show = mxs_pin_dbg_show,
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.dt_node_to_map = mxs_dt_node_to_map,
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.dt_free_map = mxs_dt_free_map,
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};
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static int mxs_pinctrl_get_funcs_count(struct pinctrl_dev *pctldev)
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{
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struct mxs_pinctrl_data *d = pinctrl_dev_get_drvdata(pctldev);
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return d->soc->nfunctions;
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}
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static const char *mxs_pinctrl_get_func_name(struct pinctrl_dev *pctldev,
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unsigned function)
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{
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struct mxs_pinctrl_data *d = pinctrl_dev_get_drvdata(pctldev);
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return d->soc->functions[function].name;
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}
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static int mxs_pinctrl_get_func_groups(struct pinctrl_dev *pctldev,
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unsigned group,
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const char * const **groups,
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unsigned * const num_groups)
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{
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struct mxs_pinctrl_data *d = pinctrl_dev_get_drvdata(pctldev);
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*groups = d->soc->functions[group].groups;
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*num_groups = d->soc->functions[group].ngroups;
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return 0;
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}
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static int mxs_pinctrl_set_mux(struct pinctrl_dev *pctldev, unsigned selector,
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unsigned group)
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{
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struct mxs_pinctrl_data *d = pinctrl_dev_get_drvdata(pctldev);
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struct mxs_group *g = &d->soc->groups[group];
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void __iomem *reg;
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u8 bank, shift;
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u16 pin;
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u32 i;
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for (i = 0; i < g->npins; i++) {
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bank = PINID_TO_BANK(g->pins[i]);
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pin = PINID_TO_PIN(g->pins[i]);
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reg = d->base + d->soc->regs->muxsel;
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reg += bank * 0x20 + pin / 16 * 0x10;
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shift = pin % 16 * 2;
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writel(0x3 << shift, reg + CLR);
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writel(g->muxsel[i] << shift, reg + SET);
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}
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return 0;
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}
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static const struct pinmux_ops mxs_pinmux_ops = {
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.get_functions_count = mxs_pinctrl_get_funcs_count,
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.get_function_name = mxs_pinctrl_get_func_name,
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.get_function_groups = mxs_pinctrl_get_func_groups,
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.set_mux = mxs_pinctrl_set_mux,
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};
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static int mxs_pinconf_get(struct pinctrl_dev *pctldev,
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unsigned pin, unsigned long *config)
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{
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return -ENOTSUPP;
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}
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static int mxs_pinconf_set(struct pinctrl_dev *pctldev,
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unsigned pin, unsigned long *configs,
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unsigned num_configs)
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{
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return -ENOTSUPP;
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}
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static int mxs_pinconf_group_get(struct pinctrl_dev *pctldev,
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unsigned group, unsigned long *config)
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{
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struct mxs_pinctrl_data *d = pinctrl_dev_get_drvdata(pctldev);
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*config = d->soc->groups[group].config;
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return 0;
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}
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static int mxs_pinconf_group_set(struct pinctrl_dev *pctldev,
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unsigned group, unsigned long *configs,
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unsigned num_configs)
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{
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struct mxs_pinctrl_data *d = pinctrl_dev_get_drvdata(pctldev);
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struct mxs_group *g = &d->soc->groups[group];
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void __iomem *reg;
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u8 ma, vol, pull, bank, shift;
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u16 pin;
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u32 i;
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int n;
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unsigned long config;
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for (n = 0; n < num_configs; n++) {
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config = configs[n];
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ma = CONFIG_TO_MA(config);
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vol = CONFIG_TO_VOL(config);
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pull = CONFIG_TO_PULL(config);
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for (i = 0; i < g->npins; i++) {
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bank = PINID_TO_BANK(g->pins[i]);
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pin = PINID_TO_PIN(g->pins[i]);
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/* drive */
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reg = d->base + d->soc->regs->drive;
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reg += bank * 0x40 + pin / 8 * 0x10;
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/* mA */
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if (config & MA_PRESENT) {
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shift = pin % 8 * 4;
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writel(0x3 << shift, reg + CLR);
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writel(ma << shift, reg + SET);
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}
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/* vol */
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if (config & VOL_PRESENT) {
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shift = pin % 8 * 4 + 2;
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if (vol)
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writel(1 << shift, reg + SET);
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else
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writel(1 << shift, reg + CLR);
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}
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/* pull */
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if (config & PULL_PRESENT) {
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reg = d->base + d->soc->regs->pull;
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reg += bank * 0x10;
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shift = pin;
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if (pull)
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writel(1 << shift, reg + SET);
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else
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writel(1 << shift, reg + CLR);
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}
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}
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/* cache the config value for mxs_pinconf_group_get() */
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g->config = config;
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} /* for each config */
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return 0;
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}
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static void mxs_pinconf_dbg_show(struct pinctrl_dev *pctldev,
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struct seq_file *s, unsigned pin)
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{
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/* Not support */
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}
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static void mxs_pinconf_group_dbg_show(struct pinctrl_dev *pctldev,
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struct seq_file *s, unsigned group)
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{
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unsigned long config;
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if (!mxs_pinconf_group_get(pctldev, group, &config))
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seq_printf(s, "0x%lx", config);
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}
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static const struct pinconf_ops mxs_pinconf_ops = {
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.pin_config_get = mxs_pinconf_get,
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.pin_config_set = mxs_pinconf_set,
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.pin_config_group_get = mxs_pinconf_group_get,
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.pin_config_group_set = mxs_pinconf_group_set,
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.pin_config_dbg_show = mxs_pinconf_dbg_show,
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.pin_config_group_dbg_show = mxs_pinconf_group_dbg_show,
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};
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static struct pinctrl_desc mxs_pinctrl_desc = {
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.pctlops = &mxs_pinctrl_ops,
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.pmxops = &mxs_pinmux_ops,
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.confops = &mxs_pinconf_ops,
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.owner = THIS_MODULE,
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};
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static int mxs_pinctrl_parse_group(struct platform_device *pdev,
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struct device_node *np, int idx,
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const char **out_name)
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{
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struct mxs_pinctrl_data *d = platform_get_drvdata(pdev);
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struct mxs_group *g = &d->soc->groups[idx];
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struct property *prop;
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const char *propname = "fsl,pinmux-ids";
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char *group;
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int length = strlen(np->name) + SUFFIX_LEN;
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u32 val, i;
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group = devm_kzalloc(&pdev->dev, length, GFP_KERNEL);
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if (!group)
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return -ENOMEM;
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if (of_property_read_u32(np, "reg", &val))
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snprintf(group, length, "%s", np->name);
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else
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snprintf(group, length, "%s.%d", np->name, val);
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g->name = group;
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|
|
prop = of_find_property(np, propname, &length);
|
||
|
|
if (!prop)
|
||
|
|
return -EINVAL;
|
||
|
|
g->npins = length / sizeof(u32);
|
||
|
|
|
||
|
|
g->pins = devm_kzalloc(&pdev->dev, g->npins * sizeof(*g->pins),
|
||
|
|
GFP_KERNEL);
|
||
|
|
if (!g->pins)
|
||
|
|
return -ENOMEM;
|
||
|
|
|
||
|
|
g->muxsel = devm_kzalloc(&pdev->dev, g->npins * sizeof(*g->muxsel),
|
||
|
|
GFP_KERNEL);
|
||
|
|
if (!g->muxsel)
|
||
|
|
return -ENOMEM;
|
||
|
|
|
||
|
|
of_property_read_u32_array(np, propname, g->pins, g->npins);
|
||
|
|
for (i = 0; i < g->npins; i++) {
|
||
|
|
g->muxsel[i] = MUXID_TO_MUXSEL(g->pins[i]);
|
||
|
|
g->pins[i] = MUXID_TO_PINID(g->pins[i]);
|
||
|
|
}
|
||
|
|
|
||
|
|
if (out_name)
|
||
|
|
*out_name = g->name;
|
||
|
|
|
||
|
|
return 0;
|
||
|
|
}
|
||
|
|
|
||
|
|
static int mxs_pinctrl_probe_dt(struct platform_device *pdev,
|
||
|
|
struct mxs_pinctrl_data *d)
|
||
|
|
{
|
||
|
|
struct mxs_pinctrl_soc_data *soc = d->soc;
|
||
|
|
struct device_node *np = pdev->dev.of_node;
|
||
|
|
struct device_node *child;
|
||
|
|
struct mxs_function *f;
|
||
|
|
const char *gpio_compat = "fsl,mxs-gpio";
|
||
|
|
const char *fn, *fnull = "";
|
||
|
|
int i = 0, idxf = 0, idxg = 0;
|
||
|
|
int ret;
|
||
|
|
u32 val;
|
||
|
|
|
||
|
|
child = of_get_next_child(np, NULL);
|
||
|
|
if (!child) {
|
||
|
|
dev_err(&pdev->dev, "no group is defined\n");
|
||
|
|
return -ENOENT;
|
||
|
|
}
|
||
|
|
|
||
|
|
/* Count total functions and groups */
|
||
|
|
fn = fnull;
|
||
|
|
for_each_child_of_node(np, child) {
|
||
|
|
if (of_device_is_compatible(child, gpio_compat))
|
||
|
|
continue;
|
||
|
|
soc->ngroups++;
|
||
|
|
/* Skip pure pinconf node */
|
||
|
|
if (of_property_read_u32(child, "reg", &val))
|
||
|
|
continue;
|
||
|
|
if (strcmp(fn, child->name)) {
|
||
|
|
fn = child->name;
|
||
|
|
soc->nfunctions++;
|
||
|
|
}
|
||
|
|
}
|
||
|
|
|
||
|
|
soc->functions = devm_kzalloc(&pdev->dev, soc->nfunctions *
|
||
|
|
sizeof(*soc->functions), GFP_KERNEL);
|
||
|
|
if (!soc->functions)
|
||
|
|
return -ENOMEM;
|
||
|
|
|
||
|
|
soc->groups = devm_kzalloc(&pdev->dev, soc->ngroups *
|
||
|
|
sizeof(*soc->groups), GFP_KERNEL);
|
||
|
|
if (!soc->groups)
|
||
|
|
return -ENOMEM;
|
||
|
|
|
||
|
|
/* Count groups for each function */
|
||
|
|
fn = fnull;
|
||
|
|
f = &soc->functions[idxf];
|
||
|
|
for_each_child_of_node(np, child) {
|
||
|
|
if (of_device_is_compatible(child, gpio_compat))
|
||
|
|
continue;
|
||
|
|
if (of_property_read_u32(child, "reg", &val))
|
||
|
|
continue;
|
||
|
|
if (strcmp(fn, child->name)) {
|
||
|
|
f = &soc->functions[idxf++];
|
||
|
|
f->name = fn = child->name;
|
||
|
|
}
|
||
|
|
f->ngroups++;
|
||
|
|
};
|
||
|
|
|
||
|
|
/* Get groups for each function */
|
||
|
|
idxf = 0;
|
||
|
|
fn = fnull;
|
||
|
|
for_each_child_of_node(np, child) {
|
||
|
|
if (of_device_is_compatible(child, gpio_compat))
|
||
|
|
continue;
|
||
|
|
if (of_property_read_u32(child, "reg", &val)) {
|
||
|
|
ret = mxs_pinctrl_parse_group(pdev, child,
|
||
|
|
idxg++, NULL);
|
||
|
|
if (ret)
|
||
|
|
return ret;
|
||
|
|
continue;
|
||
|
|
}
|
||
|
|
|
||
|
|
if (strcmp(fn, child->name)) {
|
||
|
|
f = &soc->functions[idxf++];
|
||
|
|
f->groups = devm_kzalloc(&pdev->dev, f->ngroups *
|
||
|
|
sizeof(*f->groups),
|
||
|
|
GFP_KERNEL);
|
||
|
|
if (!f->groups)
|
||
|
|
return -ENOMEM;
|
||
|
|
fn = child->name;
|
||
|
|
i = 0;
|
||
|
|
}
|
||
|
|
ret = mxs_pinctrl_parse_group(pdev, child, idxg++,
|
||
|
|
&f->groups[i++]);
|
||
|
|
if (ret)
|
||
|
|
return ret;
|
||
|
|
}
|
||
|
|
|
||
|
|
return 0;
|
||
|
|
}
|
||
|
|
|
||
|
|
int mxs_pinctrl_probe(struct platform_device *pdev,
|
||
|
|
struct mxs_pinctrl_soc_data *soc)
|
||
|
|
{
|
||
|
|
struct device_node *np = pdev->dev.of_node;
|
||
|
|
struct mxs_pinctrl_data *d;
|
||
|
|
int ret;
|
||
|
|
|
||
|
|
d = devm_kzalloc(&pdev->dev, sizeof(*d), GFP_KERNEL);
|
||
|
|
if (!d)
|
||
|
|
return -ENOMEM;
|
||
|
|
|
||
|
|
d->dev = &pdev->dev;
|
||
|
|
d->soc = soc;
|
||
|
|
|
||
|
|
d->base = of_iomap(np, 0);
|
||
|
|
if (!d->base)
|
||
|
|
return -EADDRNOTAVAIL;
|
||
|
|
|
||
|
|
mxs_pinctrl_desc.pins = d->soc->pins;
|
||
|
|
mxs_pinctrl_desc.npins = d->soc->npins;
|
||
|
|
mxs_pinctrl_desc.name = dev_name(&pdev->dev);
|
||
|
|
|
||
|
|
platform_set_drvdata(pdev, d);
|
||
|
|
|
||
|
|
ret = mxs_pinctrl_probe_dt(pdev, d);
|
||
|
|
if (ret) {
|
||
|
|
dev_err(&pdev->dev, "dt probe failed: %d\n", ret);
|
||
|
|
goto err;
|
||
|
|
}
|
||
|
|
|
||
|
|
d->pctl = pinctrl_register(&mxs_pinctrl_desc, &pdev->dev, d);
|
||
|
|
if (!d->pctl) {
|
||
|
|
dev_err(&pdev->dev, "Couldn't register MXS pinctrl driver\n");
|
||
|
|
ret = -EINVAL;
|
||
|
|
goto err;
|
||
|
|
}
|
||
|
|
|
||
|
|
return 0;
|
||
|
|
|
||
|
|
err:
|
||
|
|
iounmap(d->base);
|
||
|
|
return ret;
|
||
|
|
}
|
||
|
|
EXPORT_SYMBOL_GPL(mxs_pinctrl_probe);
|
||
|
|
|
||
|
|
int mxs_pinctrl_remove(struct platform_device *pdev)
|
||
|
|
{
|
||
|
|
struct mxs_pinctrl_data *d = platform_get_drvdata(pdev);
|
||
|
|
|
||
|
|
pinctrl_unregister(d->pctl);
|
||
|
|
iounmap(d->base);
|
||
|
|
|
||
|
|
return 0;
|
||
|
|
}
|
||
|
|
EXPORT_SYMBOL_GPL(mxs_pinctrl_remove);
|