135 lines
3.9 KiB
C
135 lines
3.9 KiB
C
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/* Copyright (c) 2011-2015, The Linux Foundation. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 and
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* only version 2 as published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#ifndef __ARCH_ARM_MACH_MSM_SPM_DEVICES_H
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#define __ARCH_ARM_MACH_MSM_SPM_DEVICES_H
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#include <soc/qcom/spm.h>
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enum {
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MSM_SPM_REG_SAW_CFG,
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MSM_SPM_REG_SAW_AVS_CTL,
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MSM_SPM_REG_SAW_AVS_HYSTERESIS,
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MSM_SPM_REG_SAW_SPM_CTL,
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MSM_SPM_REG_SAW_PMIC_DLY,
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MSM_SPM_REG_SAW_AVS_LIMIT,
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MSM_SPM_REG_SAW_AVS_DLY,
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MSM_SPM_REG_SAW_SPM_DLY,
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MSM_SPM_REG_SAW_PMIC_DATA_0,
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MSM_SPM_REG_SAW_PMIC_DATA_1,
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MSM_SPM_REG_SAW_PMIC_DATA_2,
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MSM_SPM_REG_SAW_PMIC_DATA_3,
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MSM_SPM_REG_SAW_PMIC_DATA_4,
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MSM_SPM_REG_SAW_PMIC_DATA_5,
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MSM_SPM_REG_SAW_PMIC_DATA_6,
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MSM_SPM_REG_SAW_PMIC_DATA_7,
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MSM_SPM_REG_SAW_RST,
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MSM_SPM_REG_NR_INITIALIZE = MSM_SPM_REG_SAW_RST,
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MSM_SPM_REG_SAW_ID,
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MSM_SPM_REG_SAW_SECURE,
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MSM_SPM_REG_SAW_STS0,
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MSM_SPM_REG_SAW_STS1,
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MSM_SPM_REG_SAW_STS2,
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MSM_SPM_REG_SAW_VCTL,
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MSM_SPM_REG_SAW_SEQ_ENTRY,
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MSM_SPM_REG_SAW_SPM_STS,
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MSM_SPM_REG_SAW_AVS_STS,
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MSM_SPM_REG_SAW_PMIC_STS,
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MSM_SPM_REG_SAW_VERSION,
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MSM_SPM_REG_NR,
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};
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struct msm_spm_seq_entry {
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uint32_t mode;
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uint8_t *cmd;
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uint32_t ctl;
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};
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struct msm_spm_platform_data {
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void __iomem *reg_base_addr;
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uint32_t reg_init_values[MSM_SPM_REG_NR_INITIALIZE];
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uint32_t ver_reg;
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uint32_t vctl_port;
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uint32_t phase_port;
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uint32_t pfm_port;
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uint8_t awake_vlevel;
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uint32_t vctl_timeout_us;
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uint32_t avs_timeout_us;
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uint32_t num_modes;
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struct msm_spm_seq_entry *modes;
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};
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enum msm_spm_pmic_port {
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MSM_SPM_PMIC_VCTL_PORT,
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MSM_SPM_PMIC_PHASE_PORT,
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MSM_SPM_PMIC_PFM_PORT,
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};
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struct msm_spm_driver_data {
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uint32_t major;
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uint32_t minor;
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uint32_t ver_reg;
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uint32_t vctl_port;
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uint32_t phase_port;
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uint32_t pfm_port;
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void __iomem *reg_base_addr;
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uint32_t vctl_timeout_us;
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uint32_t avs_timeout_us;
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uint32_t reg_shadow[MSM_SPM_REG_NR];
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uint32_t *reg_seq_entry_shadow;
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uint32_t *reg_offsets;
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};
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int msm_spm_drv_init(struct msm_spm_driver_data *dev,
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struct msm_spm_platform_data *data);
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int msm_spm_drv_reg_init(struct msm_spm_driver_data *dev,
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struct msm_spm_platform_data *data);
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void msm_spm_drv_reinit(struct msm_spm_driver_data *dev, bool seq);
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int msm_spm_drv_set_low_power_mode(struct msm_spm_driver_data *dev,
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uint32_t ctl);
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int msm_spm_drv_set_vdd(struct msm_spm_driver_data *dev,
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unsigned int vlevel);
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void dump_regs(struct msm_spm_driver_data *dev, int cpu);
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uint32_t msm_spm_drv_get_sts_curr_pmic_data(
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struct msm_spm_driver_data *dev);
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int msm_spm_drv_write_seq_data(struct msm_spm_driver_data *dev,
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uint8_t *cmd, uint32_t *offset);
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void msm_spm_drv_flush_seq_entry(struct msm_spm_driver_data *dev);
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int msm_spm_drv_set_spm_enable(struct msm_spm_driver_data *dev,
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bool enable);
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int msm_spm_drv_set_pmic_data(struct msm_spm_driver_data *dev,
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enum msm_spm_pmic_port port, unsigned int data);
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int msm_spm_drv_set_avs_limit(struct msm_spm_driver_data *dev,
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uint32_t min_lvl, uint32_t max_lvl);
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int msm_spm_drv_set_avs_enable(struct msm_spm_driver_data *dev,
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bool enable);
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int msm_spm_drv_get_avs_enable(struct msm_spm_driver_data *dev);
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int msm_spm_drv_set_avs_irq_enable(struct msm_spm_driver_data *dev,
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enum msm_spm_avs_irq irq, bool enable);
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int msm_spm_drv_avs_clear_irq(struct msm_spm_driver_data *dev,
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enum msm_spm_avs_irq irq);
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void msm_spm_reinit(void);
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int msm_spm_init(struct msm_spm_platform_data *data, int nr_devs);
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void msm_spm_drv_upd_reg_shadow(struct msm_spm_driver_data *dev, int id,
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int val);
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uint32_t msm_spm_drv_get_vdd(struct msm_spm_driver_data *dev);
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#endif
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