284 lines
8.6 KiB
C
284 lines
8.6 KiB
C
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/*
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* max77854-muic.h - MUIC for the Maxim 77843
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*
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* Copyright (C) 2011 Samsung Electrnoics
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* Seoyoung Jeong <seo0.jeong@samsung.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*
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* This driver is based on max14577-muic.h
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*
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*/
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#ifndef __MAX77854_MUIC_H__
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#define __MAX77854_MUIC_H__
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#define MUIC_DEV_NAME "muic-max77854"
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/* muic chip specific internal data structure */
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struct max77854_muic_data {
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struct device *dev;
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struct i2c_client *i2c; /* i2c addr: 0x4A; MUIC */
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struct mutex muic_mutex;
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struct mutex reset_mutex;
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/* model dependant mfd platform data */
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struct max77854_platform_data *mfd_pdata;
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int irq_adc1k;
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int irq_adcerr;
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int irq_adc;
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int irq_chgtyp;
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int irq_vbvolt;
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int irq_vdnmon;
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int irq_mrxrdy;
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int irq_mpnack;
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int irq_vbadc;
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int irq_reset_acokbf;
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/* model dependant muic platform data */
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struct muic_platform_data *pdata;
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/* muic current attached device */
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muic_attached_dev_t attached_dev;
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/* muic support vps list */
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bool muic_support_list[ATTACHED_DEV_NUM];
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bool is_muic_ready;
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bool is_muic_reset;
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bool ignore_adcerr;
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/* check is otg test for jig uart off + vb */
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bool is_otg_test;
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bool is_factory_start;
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bool is_afc_muic_ready;
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bool is_afc_handshaking;
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bool is_afc_muic_prepare;
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bool is_charger_ready;
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bool is_qc_vb_settle;
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u8 is_boot_dpdnvden;
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u8 tx_data;
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bool is_mrxrdy;
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int afc_count;
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muic_afc_data_t afc_data;
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u8 qc_hv;
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struct delayed_work hv_muic_qc_vb_work;
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struct delayed_work hv_muic_mping_miss_wa;
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/* muic status value */
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u8 status1;
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u8 status2;
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u8 status3;
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/* muic hvcontrol value */
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u8 hvcontrol1;
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u8 hvcontrol2;
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/* legacy TA or USB for CCIC */
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muic_attached_dev_t legacy_dev;
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};
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/* max77854 muic register read/write related information defines. */
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/* MAX77854 REGISTER ENABLE or DISABLE bit */
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enum max77854_reg_bit_control {
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MAX77854_DISABLE_BIT = 0,
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MAX77854_ENABLE_BIT,
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};
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/* MAX77854 STATUS1 register */
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#define STATUS1_ADC_SHIFT 0
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#define STATUS1_ADCERR_SHIFT 6
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#define STATUS1_ADC1K_SHIFT 7
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#define STATUS1_ADC_MASK (0x1f << STATUS1_ADC_SHIFT)
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#define STATUS1_ADCERR_MASK (0x1 << STATUS1_ADCERR_SHIFT)
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#define STATUS1_ADC1K_MASK (0x1 << STATUS1_ADC1K_SHIFT)
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/* MAX77854 STATUS2 register */
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#define STATUS2_CHGTYP_SHIFT 0
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#define STATUS2_CHGDETRUN_SHIFT 3
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#define STATUS2_DCDTMR_SHIFT 4
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#define STATUS2_DXOVP_SHIFT 5
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#define STATUS2_VBVOLT_SHIFT 6
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#define STATUS2_CHGTYP_MASK (0x7 << STATUS2_CHGTYP_SHIFT)
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#define STATUS2_CHGDETRUN_MASK (0x1 << STATUS2_CHGDETRUN_SHIFT)
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#define STATUS2_DCDTMR_MASK (0x1 << STATUS2_DCDTMR_SHIFT)
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#define STATUS2_DXOVP_MASK (0x1 << STATUS2_DXOVP_SHIFT)
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#define STATUS2_VBVOLT_MASK (0x1 << STATUS2_VBVOLT_SHIFT)
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/* MAX77854 CDETCTRL1 register */
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#define CHGDETEN_SHIFT 0
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#define CHGTYPM_SHIFT 1
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#define CDDELAY_SHIFT 4
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#define CHGDETEN_MASK (0x1 << CHGDETEN_SHIFT)
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#define CHGTYPM_MASK (0x1 << CHGTYPM_SHIFT)
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#define CDDELAY_MASK (0x1 << CDDELAY_SHIFT)
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/* MAX77854 CONTROL1 register */
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#define COMN1SW_SHIFT 0
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#define COMP2SW_SHIFT 3
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#define NOBCCOMP_SHIFT 6
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#define IDBEN_SHIFT 7
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#define COMN1SW_MASK (0x7 << COMN1SW_SHIFT)
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#define COMP2SW_MASK (0x7 << COMP2SW_SHIFT)
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#define NOBCCOMP_MASK (0x1 << NOBCCOMP_SHIFT)
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#define IDBEN_MASK (0x1 << IDBEN_SHIFT)
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#define CLEAR_IDBEN_RSVD_MASK (COMN1SW_MASK | COMP2SW_MASK)
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/* MAX77854 CONTROL2 register */
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#define CTRL2_LOWPWR_SHIFT 0
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#define CTRL2_CPEN_SHIFT 2
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#define CTRL2_ACCDET_SHIFT 5
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#define CTRL2_LOWPWR_MASK (0x1 << CTRL2_LOWPWR_SHIFT)
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#define CTRL2_CPEN_MASK (0x1 << CTRL2_CPEN_SHIFT)
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#define CTRL2_ACCDET_MASK (0x1 << CTRL2_ACCDET_SHIFT)
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#define CTRL2_CPEN1_LOWPWD0 ((MAX77854_ENABLE_BIT << CTRL2_CPEN_SHIFT) | \
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(MAX77854_DISABLE_BIT << CTRL2_ADCLOWPWR_SHIFT))
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#define CTRL2_CPEN0_LOWPWD1 ((MAX77854_DISABLE_BIT << CTRL2_CPEN_SHIFT) | \
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(MAX77854_ENABLE_BIT << CTRL2_ADCLOWPWR_SHIFT))
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/* MAX77854 CONTROL3 register */
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#define CTRL3_JIGSET_SHIFT 0
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#define CTRL3_JIGSET_MASK (0x3 << CTRL3_JIGSET_SHIFT)
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/* MAX77854 CONTROL4 register */
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#define CTRL4_ADCDBSET_SHIFT 0
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#define CTRL4_ADCMODE_SHIFT 6
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#define CTRL4_ADCDBSET_MASK (0x3 << CTRL4_ADCDBSET_SHIFT)
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#define CTRL4_ADCMODE_MASK (0x3 << CTRL4_ADCMODE_SHIFT)
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typedef enum {
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VB_LOW = 0x00,
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VB_HIGH = (0x1 << STATUS2_VBVOLT_SHIFT),
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VB_DONTCARE = 0xff,
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} vbvolt_t;
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typedef enum {
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CHGDETRUN_FALSE = 0x00,
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CHGDETRUN_TRUE = (0x1 << STATUS2_CHGDETRUN_SHIFT),
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CHGDETRUN_DONTCARE = 0xff,
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} chgdetrun_t;
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/* MAX77854 MUIC Output of USB Charger Detection */
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typedef enum {
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/* No Valid voltage at VB (Vvb < Vvbdet) */
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CHGTYP_NO_VOLTAGE = 0x00,
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/* Unknown (D+/D- does not present a valid USB charger signature) */
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CHGTYP_USB = 0x01,
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/* Charging Downstream Port */
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CHGTYP_CDP = 0x02,
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/* Dedicated Charger (D+/D- shorted) */
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CHGTYP_DEDICATED_CHARGER = 0x03,
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/* Special 500mA charger, max current 500mA */
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CHGTYP_500MA = 0x04,
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/* Special 1A charger, max current 1A */
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CHGTYP_1A = 0x05,
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/* Special charger - 3.3V bias on D+/D- */
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CHGTYP_SPECIAL_3_3V_CHARGER = 0x06,
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/* Reserved */
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CHGTYP_RFU = 0x07,
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/* Any charger w/o USB */
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CHGTYP_UNOFFICIAL_CHARGER = 0xfc,
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/* Any charger type */
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CHGTYP_ANY = 0xfd,
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/* Don't care charger type */
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CHGTYP_DONTCARE = 0xfe,
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CHGTYP_MAX,
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CHGTYP_INIT,
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CHGTYP_MIN = CHGTYP_NO_VOLTAGE
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} chgtyp_t;
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typedef enum {
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PROCESS_ATTACH = 0,
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PROCESS_LOGICALLY_DETACH,
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PROCESS_NONE,
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} process_t;
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/* muic register value for COMN1, COMN2 in CTRL1 reg */
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/*
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* MAX77854 CONTROL1 register
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* ID Bypass [7] / Mic En [6] / D+ [5:3] / D- [2:0]
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* 0: ID Bypass Open / 1: IDB connect to UID
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* 0: Mic En Open / 1: Mic connect to VB
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* 000: Open / 001: USB / 010: Audio / 011: UART
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*/
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enum max77854_reg_ctrl1_val {
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MAX77854_MUIC_CTRL1_ID_OPEN = 0x0,
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MAX77854_MUIC_CTRL1_ID_BYPASS = 0x1,
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MAX77854_MUIC_CTRL1_NO_BC_COMP_OFF = 0x0,
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MAX77854_MUIC_CTRL1_NO_BC_COMP_ON = 0x1,
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MAX77854_MUIC_CTRL1_COM_OPEN = 0x00,
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MAX77854_MUIC_CTRL1_COM_USB = 0x01,
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MAX77854_MUIC_CTRL1_COM_AUDIO = 0x02,
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MAX77854_MUIC_CTRL1_COM_UART = 0x03,
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MAX77854_MUIC_CTRL1_COM_USB_CP = 0x04,
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MAX77854_MUIC_CTRL1_COM_UART_CP = 0x05,
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};
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typedef enum {
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CTRL1_OPEN = (MAX77854_MUIC_CTRL1_ID_OPEN << IDBEN_SHIFT) | \
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(MAX77854_MUIC_CTRL1_NO_BC_COMP_OFF << NOBCCOMP_SHIFT) | \
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(MAX77854_MUIC_CTRL1_COM_OPEN << COMP2SW_SHIFT) | \
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(MAX77854_MUIC_CTRL1_COM_OPEN << COMN1SW_SHIFT),
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CTRL1_USB = (MAX77854_MUIC_CTRL1_ID_OPEN << IDBEN_SHIFT) | \
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(MAX77854_MUIC_CTRL1_NO_BC_COMP_OFF << NOBCCOMP_SHIFT) | \
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(MAX77854_MUIC_CTRL1_COM_USB << COMP2SW_SHIFT) | \
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(MAX77854_MUIC_CTRL1_COM_USB << COMN1SW_SHIFT),
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CTRL1_AUDIO = (MAX77854_MUIC_CTRL1_ID_OPEN << IDBEN_SHIFT) | \
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(MAX77854_MUIC_CTRL1_NO_BC_COMP_OFF << NOBCCOMP_SHIFT) | \
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(MAX77854_MUIC_CTRL1_COM_AUDIO << COMP2SW_SHIFT) | \
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(MAX77854_MUIC_CTRL1_COM_AUDIO << COMN1SW_SHIFT),
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CTRL1_UART = (MAX77854_MUIC_CTRL1_ID_OPEN << IDBEN_SHIFT) | \
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(MAX77854_MUIC_CTRL1_NO_BC_COMP_OFF << NOBCCOMP_SHIFT) | \
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(MAX77854_MUIC_CTRL1_COM_UART << COMP2SW_SHIFT) | \
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(MAX77854_MUIC_CTRL1_COM_UART << COMN1SW_SHIFT),
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CTRL1_USB_CP = (MAX77854_MUIC_CTRL1_ID_OPEN << IDBEN_SHIFT) | \
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(MAX77854_MUIC_CTRL1_NO_BC_COMP_OFF << NOBCCOMP_SHIFT) | \
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(MAX77854_MUIC_CTRL1_COM_USB_CP << COMP2SW_SHIFT) | \
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(MAX77854_MUIC_CTRL1_COM_USB_CP << COMN1SW_SHIFT),
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CTRL1_UART_CP = (MAX77854_MUIC_CTRL1_ID_OPEN << IDBEN_SHIFT) | \
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(MAX77854_MUIC_CTRL1_NO_BC_COMP_OFF << NOBCCOMP_SHIFT) | \
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(MAX77854_MUIC_CTRL1_COM_UART_CP << COMP2SW_SHIFT) | \
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(MAX77854_MUIC_CTRL1_COM_UART_CP << COMN1SW_SHIFT),
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CTRL1_USB_DOCK = (MAX77854_MUIC_CTRL1_ID_OPEN << IDBEN_SHIFT) | \
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(MAX77854_MUIC_CTRL1_NO_BC_COMP_ON << NOBCCOMP_SHIFT) | \
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(MAX77854_MUIC_CTRL1_COM_USB << COMP2SW_SHIFT) | \
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(MAX77854_MUIC_CTRL1_COM_USB << COMN1SW_SHIFT),
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} max77854_reg_ctrl1_t;
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enum {
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MAX77854_MUIC_CTRL4_ADCMODE_ALWAYS_ON = 0x00,
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MAX77854_MUIC_CTRL4_ADCMODE_ALWAYS_ON_1M_MON = 0x01,
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MAX77854_MUIC_CTRL4_ADCMODE_ONE_SHOT = 0x02,
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MAX77854_MUIC_CTRL4_ADCMODE_2S_PULSE = 0x03
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};
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extern struct device *switch_device;
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#endif /* __MAX77854_MUIC_H__ */
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