82 lines
2 KiB
C
82 lines
2 KiB
C
/*
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* Copyright 2011 Freescale Semiconductor, Inc. All Rights Reserved.
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* Copyright 2011 Linaro Ltd.
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*
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* The code contained herein is licensed under the GNU General Public
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* License. You may obtain a copy of the GNU General Public License
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* Version 2 or later at the following locations:
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*
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* http://www.opensource.org/licenses/gpl-license.html
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* http://www.gnu.org/copyleft/gpl.html
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*/
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#include <linux/io.h>
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#include <linux/irq.h>
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#include <linux/of_irq.h>
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#include <linux/of_platform.h>
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#include <asm/mach/arch.h>
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#include <asm/mach/time.h>
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#include "common.h"
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#include "hardware.h"
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static void __init imx51_init_early(void)
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{
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mxc_set_cpu_type(MXC_CPU_MX51);
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}
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/*
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* The MIPI HSC unit has been removed from the i.MX51 Reference Manual by
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* the Freescale marketing division. However this did not remove the
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* hardware from the chip which still needs to be configured for proper
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* IPU support.
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*/
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#define MX51_MIPI_HSC_BASE 0x83fdc000
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static void __init imx51_ipu_mipi_setup(void)
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{
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void __iomem *hsc_addr;
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hsc_addr = ioremap(MX51_MIPI_HSC_BASE, SZ_16K);
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WARN_ON(!hsc_addr);
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/* setup MIPI module to legacy mode */
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__raw_writel(0xf00, hsc_addr);
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/* CSI mode: reserved; DI control mode: legacy (from Freescale BSP) */
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__raw_writel(__raw_readl(hsc_addr + 0x800) | 0x30ff,
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hsc_addr + 0x800);
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iounmap(hsc_addr);
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}
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static void __init imx51_dt_init(void)
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{
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struct platform_device_info devinfo = { .name = "cpufreq-dt", };
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mxc_arch_reset_init_dt();
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imx51_ipu_mipi_setup();
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imx_src_init();
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of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
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platform_device_register_full(&devinfo);
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}
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static void __init imx51_init_late(void)
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{
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mx51_neon_fixup();
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imx51_pm_init();
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}
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static const char * const imx51_dt_board_compat[] __initconst = {
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"fsl,imx51",
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NULL
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};
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DT_MACHINE_START(IMX51_DT, "Freescale i.MX51 (Device Tree Support)")
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.init_early = imx51_init_early,
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.init_irq = tzic_init_irq,
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.init_machine = imx51_dt_init,
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.init_late = imx51_init_late,
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.dt_compat = imx51_dt_board_compat,
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.restart = mxc_restart,
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MACHINE_END
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