412 lines
9.7 KiB
C
412 lines
9.7 KiB
C
/*
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* linux/arch/arm/mach-sa1100/generic.c
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*
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* Author: Nicolas Pitre
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*
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* Code common to all SA11x0 machines.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/gpio.h>
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#include <linux/module.h>
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/delay.h>
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#include <linux/dma-mapping.h>
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#include <linux/pm.h>
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#include <linux/cpufreq.h>
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#include <linux/ioport.h>
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#include <linux/platform_device.h>
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#include <linux/reboot.h>
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#include <video/sa1100fb.h>
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#include <asm/div64.h>
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#include <asm/mach/map.h>
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#include <asm/mach/flash.h>
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#include <asm/irq.h>
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#include <asm/system_misc.h>
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#include <mach/hardware.h>
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#include <mach/irqs.h>
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#include "generic.h"
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unsigned int reset_status;
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EXPORT_SYMBOL(reset_status);
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#define NR_FREQS 16
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/*
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* This table is setup for a 3.6864MHz Crystal.
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*/
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struct cpufreq_frequency_table sa11x0_freq_table[NR_FREQS+1] = {
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{ .frequency = 59000, /* 59.0 MHz */},
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{ .frequency = 73700, /* 73.7 MHz */},
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{ .frequency = 88500, /* 88.5 MHz */},
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{ .frequency = 103200, /* 103.2 MHz */},
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{ .frequency = 118000, /* 118.0 MHz */},
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{ .frequency = 132700, /* 132.7 MHz */},
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{ .frequency = 147500, /* 147.5 MHz */},
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{ .frequency = 162200, /* 162.2 MHz */},
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{ .frequency = 176900, /* 176.9 MHz */},
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{ .frequency = 191700, /* 191.7 MHz */},
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{ .frequency = 206400, /* 206.4 MHz */},
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{ .frequency = 221200, /* 221.2 MHz */},
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{ .frequency = 235900, /* 235.9 MHz */},
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{ .frequency = 250700, /* 250.7 MHz */},
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{ .frequency = 265400, /* 265.4 MHz */},
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{ .frequency = 280200, /* 280.2 MHz */},
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{ .frequency = CPUFREQ_TABLE_END, },
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};
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unsigned int sa11x0_getspeed(unsigned int cpu)
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{
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if (cpu)
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return 0;
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return sa11x0_freq_table[PPCR & 0xf].frequency;
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}
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/*
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* Default power-off for SA1100
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*/
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static void sa1100_power_off(void)
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{
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mdelay(100);
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local_irq_disable();
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/* disable internal oscillator, float CS lines */
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PCFR = (PCFR_OPDE | PCFR_FP | PCFR_FS);
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/* enable wake-up on GPIO0 (Assabet...) */
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PWER = GFER = GRER = 1;
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/*
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* set scratchpad to zero, just in case it is used as a
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* restart address by the bootloader.
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*/
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PSPR = 0;
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/* enter sleep mode */
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PMCR = PMCR_SF;
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}
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void sa11x0_restart(enum reboot_mode mode, const char *cmd)
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{
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if (mode == REBOOT_SOFT) {
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/* Jump into ROM at address 0 */
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soft_restart(0);
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} else {
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/* Use on-chip reset capability */
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RSRR = RSRR_SWR;
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}
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}
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static void sa11x0_register_device(struct platform_device *dev, void *data)
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{
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int err;
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dev->dev.platform_data = data;
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err = platform_device_register(dev);
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if (err)
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printk(KERN_ERR "Unable to register device %s: %d\n",
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dev->name, err);
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}
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static struct resource sa11x0udc_resources[] = {
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[0] = DEFINE_RES_MEM(__PREG(Ser0UDCCR), SZ_64K),
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[1] = DEFINE_RES_IRQ(IRQ_Ser0UDC),
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};
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static u64 sa11x0udc_dma_mask = 0xffffffffUL;
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static struct platform_device sa11x0udc_device = {
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.name = "sa11x0-udc",
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.id = -1,
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.dev = {
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.dma_mask = &sa11x0udc_dma_mask,
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.coherent_dma_mask = 0xffffffff,
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},
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.num_resources = ARRAY_SIZE(sa11x0udc_resources),
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.resource = sa11x0udc_resources,
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};
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static struct resource sa11x0uart1_resources[] = {
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[0] = DEFINE_RES_MEM(__PREG(Ser1UTCR0), SZ_64K),
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[1] = DEFINE_RES_IRQ(IRQ_Ser1UART),
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};
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static struct platform_device sa11x0uart1_device = {
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.name = "sa11x0-uart",
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.id = 1,
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.num_resources = ARRAY_SIZE(sa11x0uart1_resources),
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.resource = sa11x0uart1_resources,
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};
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static struct resource sa11x0uart3_resources[] = {
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[0] = DEFINE_RES_MEM(__PREG(Ser3UTCR0), SZ_64K),
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[1] = DEFINE_RES_IRQ(IRQ_Ser3UART),
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};
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static struct platform_device sa11x0uart3_device = {
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.name = "sa11x0-uart",
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.id = 3,
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.num_resources = ARRAY_SIZE(sa11x0uart3_resources),
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.resource = sa11x0uart3_resources,
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};
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static struct resource sa11x0mcp_resources[] = {
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[0] = DEFINE_RES_MEM(__PREG(Ser4MCCR0), SZ_64K),
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[1] = DEFINE_RES_MEM(__PREG(Ser4MCCR1), 4),
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[2] = DEFINE_RES_IRQ(IRQ_Ser4MCP),
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};
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static u64 sa11x0mcp_dma_mask = 0xffffffffUL;
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static struct platform_device sa11x0mcp_device = {
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.name = "sa11x0-mcp",
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.id = -1,
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.dev = {
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.dma_mask = &sa11x0mcp_dma_mask,
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.coherent_dma_mask = 0xffffffff,
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},
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.num_resources = ARRAY_SIZE(sa11x0mcp_resources),
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.resource = sa11x0mcp_resources,
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};
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void __init sa11x0_ppc_configure_mcp(void)
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{
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/* Setup the PPC unit for the MCP */
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PPDR &= ~PPC_RXD4;
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PPDR |= PPC_TXD4 | PPC_SCLK | PPC_SFRM;
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PSDR |= PPC_RXD4;
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PSDR &= ~(PPC_TXD4 | PPC_SCLK | PPC_SFRM);
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PPSR &= ~(PPC_TXD4 | PPC_SCLK | PPC_SFRM);
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}
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void sa11x0_register_mcp(struct mcp_plat_data *data)
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{
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sa11x0_register_device(&sa11x0mcp_device, data);
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}
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static struct resource sa11x0ssp_resources[] = {
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[0] = DEFINE_RES_MEM(0x80070000, SZ_64K),
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[1] = DEFINE_RES_IRQ(IRQ_Ser4SSP),
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};
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static u64 sa11x0ssp_dma_mask = 0xffffffffUL;
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static struct platform_device sa11x0ssp_device = {
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.name = "sa11x0-ssp",
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.id = -1,
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.dev = {
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.dma_mask = &sa11x0ssp_dma_mask,
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.coherent_dma_mask = 0xffffffff,
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},
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.num_resources = ARRAY_SIZE(sa11x0ssp_resources),
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.resource = sa11x0ssp_resources,
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};
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static struct resource sa11x0fb_resources[] = {
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[0] = DEFINE_RES_MEM(0xb0100000, SZ_64K),
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[1] = DEFINE_RES_IRQ(IRQ_LCD),
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};
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static struct platform_device sa11x0fb_device = {
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.name = "sa11x0-fb",
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.id = -1,
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.dev = {
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.coherent_dma_mask = 0xffffffff,
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},
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.num_resources = ARRAY_SIZE(sa11x0fb_resources),
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.resource = sa11x0fb_resources,
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};
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void sa11x0_register_lcd(struct sa1100fb_mach_info *inf)
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{
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sa11x0_register_device(&sa11x0fb_device, inf);
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}
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static struct platform_device sa11x0pcmcia_device = {
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.name = "sa11x0-pcmcia",
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.id = -1,
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};
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static struct platform_device sa11x0mtd_device = {
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.name = "sa1100-mtd",
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.id = -1,
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};
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void sa11x0_register_mtd(struct flash_platform_data *flash,
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struct resource *res, int nr)
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{
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flash->name = "sa1100";
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sa11x0mtd_device.resource = res;
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sa11x0mtd_device.num_resources = nr;
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sa11x0_register_device(&sa11x0mtd_device, flash);
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}
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static struct resource sa11x0ir_resources[] = {
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DEFINE_RES_MEM(__PREG(Ser2UTCR0), 0x24),
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DEFINE_RES_MEM(__PREG(Ser2HSCR0), 0x1c),
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DEFINE_RES_MEM(__PREG(Ser2HSCR2), 0x04),
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DEFINE_RES_IRQ(IRQ_Ser2ICP),
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};
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static struct platform_device sa11x0ir_device = {
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.name = "sa11x0-ir",
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.id = -1,
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.num_resources = ARRAY_SIZE(sa11x0ir_resources),
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.resource = sa11x0ir_resources,
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};
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void sa11x0_register_irda(struct irda_platform_data *irda)
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{
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sa11x0_register_device(&sa11x0ir_device, irda);
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}
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static struct resource sa1100_rtc_resources[] = {
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DEFINE_RES_MEM(0x90010000, 0x40),
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DEFINE_RES_IRQ_NAMED(IRQ_RTC1Hz, "rtc 1Hz"),
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DEFINE_RES_IRQ_NAMED(IRQ_RTCAlrm, "rtc alarm"),
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};
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static struct platform_device sa11x0rtc_device = {
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.name = "sa1100-rtc",
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.id = -1,
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.num_resources = ARRAY_SIZE(sa1100_rtc_resources),
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.resource = sa1100_rtc_resources,
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};
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static struct resource sa11x0dma_resources[] = {
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DEFINE_RES_MEM(DMA_PHYS, DMA_SIZE),
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DEFINE_RES_IRQ(IRQ_DMA0),
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DEFINE_RES_IRQ(IRQ_DMA1),
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DEFINE_RES_IRQ(IRQ_DMA2),
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DEFINE_RES_IRQ(IRQ_DMA3),
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DEFINE_RES_IRQ(IRQ_DMA4),
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DEFINE_RES_IRQ(IRQ_DMA5),
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};
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static u64 sa11x0dma_dma_mask = DMA_BIT_MASK(32);
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static struct platform_device sa11x0dma_device = {
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.name = "sa11x0-dma",
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.id = -1,
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.dev = {
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.dma_mask = &sa11x0dma_dma_mask,
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.coherent_dma_mask = 0xffffffff,
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},
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.num_resources = ARRAY_SIZE(sa11x0dma_resources),
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.resource = sa11x0dma_resources,
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};
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static struct platform_device *sa11x0_devices[] __initdata = {
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&sa11x0udc_device,
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&sa11x0uart1_device,
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&sa11x0uart3_device,
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&sa11x0ssp_device,
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&sa11x0pcmcia_device,
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&sa11x0rtc_device,
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&sa11x0dma_device,
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};
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static int __init sa1100_init(void)
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{
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pm_power_off = sa1100_power_off;
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return platform_add_devices(sa11x0_devices, ARRAY_SIZE(sa11x0_devices));
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}
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arch_initcall(sa1100_init);
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void __init sa11x0_init_late(void)
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{
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sa11x0_pm_init();
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}
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/*
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* Common I/O mapping:
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*
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* Typically, static virtual address mappings are as follow:
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*
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* 0xf0000000-0xf3ffffff: miscellaneous stuff (CPLDs, etc.)
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* 0xf4000000-0xf4ffffff: SA-1111
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* 0xf5000000-0xf5ffffff: reserved (used by cache flushing area)
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* 0xf6000000-0xfffeffff: reserved (internal SA1100 IO defined above)
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* 0xffff0000-0xffff0fff: SA1100 exception vectors
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* 0xffff2000-0xffff2fff: Minicache copy_user_page area
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*
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* Below 0xe8000000 is reserved for vm allocation.
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*
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* The machine specific code must provide the extra mapping beside the
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* default mapping provided here.
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*/
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static struct map_desc standard_io_desc[] __initdata = {
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{ /* PCM */
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.virtual = 0xf8000000,
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.pfn = __phys_to_pfn(0x80000000),
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.length = 0x00100000,
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.type = MT_DEVICE
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}, { /* SCM */
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.virtual = 0xfa000000,
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.pfn = __phys_to_pfn(0x90000000),
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.length = 0x00100000,
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.type = MT_DEVICE
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}, { /* MER */
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.virtual = 0xfc000000,
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.pfn = __phys_to_pfn(0xa0000000),
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.length = 0x00100000,
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.type = MT_DEVICE
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}, { /* LCD + DMA */
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.virtual = 0xfe000000,
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.pfn = __phys_to_pfn(0xb0000000),
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.length = 0x00200000,
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.type = MT_DEVICE
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},
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};
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void __init sa1100_map_io(void)
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{
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iotable_init(standard_io_desc, ARRAY_SIZE(standard_io_desc));
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}
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/*
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* Disable the memory bus request/grant signals on the SA1110 to
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* ensure that we don't receive spurious memory requests. We set
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* the MBGNT signal false to ensure the SA1111 doesn't own the
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* SDRAM bus.
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*/
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void sa1110_mb_disable(void)
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{
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unsigned long flags;
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local_irq_save(flags);
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PGSR &= ~GPIO_MBGNT;
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GPCR = GPIO_MBGNT;
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GPDR = (GPDR & ~GPIO_MBREQ) | GPIO_MBGNT;
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GAFR &= ~(GPIO_MBGNT | GPIO_MBREQ);
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local_irq_restore(flags);
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}
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/*
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* If the system is going to use the SA-1111 DMA engines, set up
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* the memory bus request/grant pins.
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*/
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void sa1110_mb_enable(void)
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{
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unsigned long flags;
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local_irq_save(flags);
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PGSR &= ~GPIO_MBGNT;
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GPCR = GPIO_MBGNT;
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GPDR = (GPDR & ~GPIO_MBREQ) | GPIO_MBGNT;
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GAFR |= (GPIO_MBGNT | GPIO_MBREQ);
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TUCR |= TUCR_MR;
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local_irq_restore(flags);
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}
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