154 lines
3.8 KiB
C
154 lines
3.8 KiB
C
/*
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* linux/arch/arm/mach-w90x900/gpio.c
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*
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* Generic nuc900 GPIO handling
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*
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* Wan ZongShun <mcuos.com@gmail.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/clk.h>
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#include <linux/errno.h>
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#include <linux/interrupt.h>
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#include <linux/irq.h>
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#include <linux/debugfs.h>
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#include <linux/seq_file.h>
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#include <linux/kernel.h>
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#include <linux/list.h>
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#include <linux/module.h>
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#include <linux/io.h>
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#include <linux/gpio.h>
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#include <mach/hardware.h>
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#define GPIO_BASE (W90X900_VA_GPIO)
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#define GPIO_DIR (0x04)
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#define GPIO_OUT (0x08)
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#define GPIO_IN (0x0C)
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#define GROUPINERV (0x10)
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#define GPIO_GPIO(Nb) (0x00000001 << (Nb))
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#define to_nuc900_gpio_chip(c) container_of(c, struct nuc900_gpio_chip, chip)
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#define NUC900_GPIO_CHIP(name, base_gpio, nr_gpio) \
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{ \
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.chip = { \
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.label = name, \
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.direction_input = nuc900_dir_input, \
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.direction_output = nuc900_dir_output, \
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.get = nuc900_gpio_get, \
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.set = nuc900_gpio_set, \
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.base = base_gpio, \
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.ngpio = nr_gpio, \
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} \
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}
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struct nuc900_gpio_chip {
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struct gpio_chip chip;
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void __iomem *regbase; /* Base of group register*/
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spinlock_t gpio_lock;
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};
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static int nuc900_gpio_get(struct gpio_chip *chip, unsigned offset)
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{
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struct nuc900_gpio_chip *nuc900_gpio = to_nuc900_gpio_chip(chip);
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void __iomem *pio = nuc900_gpio->regbase + GPIO_IN;
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unsigned int regval;
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regval = __raw_readl(pio);
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regval &= GPIO_GPIO(offset);
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return (regval != 0);
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}
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static void nuc900_gpio_set(struct gpio_chip *chip, unsigned offset, int val)
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{
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struct nuc900_gpio_chip *nuc900_gpio = to_nuc900_gpio_chip(chip);
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void __iomem *pio = nuc900_gpio->regbase + GPIO_OUT;
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unsigned int regval;
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unsigned long flags;
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spin_lock_irqsave(&nuc900_gpio->gpio_lock, flags);
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regval = __raw_readl(pio);
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if (val)
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regval |= GPIO_GPIO(offset);
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else
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regval &= ~GPIO_GPIO(offset);
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__raw_writel(regval, pio);
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spin_unlock_irqrestore(&nuc900_gpio->gpio_lock, flags);
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}
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static int nuc900_dir_input(struct gpio_chip *chip, unsigned offset)
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{
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struct nuc900_gpio_chip *nuc900_gpio = to_nuc900_gpio_chip(chip);
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void __iomem *pio = nuc900_gpio->regbase + GPIO_DIR;
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unsigned int regval;
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unsigned long flags;
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spin_lock_irqsave(&nuc900_gpio->gpio_lock, flags);
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regval = __raw_readl(pio);
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regval &= ~GPIO_GPIO(offset);
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__raw_writel(regval, pio);
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spin_unlock_irqrestore(&nuc900_gpio->gpio_lock, flags);
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return 0;
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}
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static int nuc900_dir_output(struct gpio_chip *chip, unsigned offset, int val)
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{
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struct nuc900_gpio_chip *nuc900_gpio = to_nuc900_gpio_chip(chip);
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void __iomem *outreg = nuc900_gpio->regbase + GPIO_OUT;
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void __iomem *pio = nuc900_gpio->regbase + GPIO_DIR;
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unsigned int regval;
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unsigned long flags;
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spin_lock_irqsave(&nuc900_gpio->gpio_lock, flags);
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regval = __raw_readl(pio);
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regval |= GPIO_GPIO(offset);
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__raw_writel(regval, pio);
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regval = __raw_readl(outreg);
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if (val)
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regval |= GPIO_GPIO(offset);
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else
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regval &= ~GPIO_GPIO(offset);
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__raw_writel(regval, outreg);
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spin_unlock_irqrestore(&nuc900_gpio->gpio_lock, flags);
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return 0;
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}
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static struct nuc900_gpio_chip nuc900_gpio[] = {
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NUC900_GPIO_CHIP("GROUPC", 0, 16),
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NUC900_GPIO_CHIP("GROUPD", 16, 10),
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NUC900_GPIO_CHIP("GROUPE", 26, 14),
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NUC900_GPIO_CHIP("GROUPF", 40, 10),
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NUC900_GPIO_CHIP("GROUPG", 50, 17),
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NUC900_GPIO_CHIP("GROUPH", 67, 8),
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NUC900_GPIO_CHIP("GROUPI", 75, 17),
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};
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void __init nuc900_init_gpio(int nr_group)
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{
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unsigned i;
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struct nuc900_gpio_chip *gpio_chip;
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for (i = 0; i < nr_group; i++) {
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gpio_chip = &nuc900_gpio[i];
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spin_lock_init(&gpio_chip->gpio_lock);
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gpio_chip->regbase = GPIO_BASE + i * GROUPINERV;
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gpiochip_add(&gpio_chip->chip);
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}
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}
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