865 lines
23 KiB
C
865 lines
23 KiB
C
/* Copyright (c) 2012-2015, The Linux Foundation. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 and
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* only version 2 as published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <linux/module.h>
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#include <linux/kernel.h>
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#include <linux/io.h>
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#include <linux/delay.h>
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#include <linux/slab.h>
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#include <linux/jiffies.h>
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#include <linux/kthread.h>
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#include <linux/mutex.h>
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#include <linux/sched.h>
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#include <linux/interrupt.h>
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#include <linux/irq.h>
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#include <linux/percpu.h>
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#include <linux/of.h>
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#include <linux/cpu.h>
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#include <linux/cpu_pm.h>
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#include <linux/platform_device.h>
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#include <soc/qcom/scm.h>
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#include <soc/qcom/memory_dump.h>
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#include <soc/qcom/watchdog.h>
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#ifdef CONFIG_SEC_DEBUG
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#include <linux/qcom/sec_debug.h>
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#endif
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#ifdef CONFIG_SEC_DEBUG_SUMMARY
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#include <linux/qcom/sec_debug_summary.h>
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#endif
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#define MODULE_NAME "msm_watchdog"
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#define WDT0_ACCSCSSNBARK_INT 0
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#define TCSR_WDT_CFG 0x30
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#define WDT0_RST 0x04
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#define WDT0_EN 0x08
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#define WDT0_STS 0x0C
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#define WDT0_BARK_TIME 0x10
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#define WDT0_BITE_TIME 0x14
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#define WDOG_ABSENT 0
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#define EN 0
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#define UNMASKED_INT_EN 1
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#define MASK_SIZE 32
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#define SCM_SET_REGSAVE_CMD 0x2
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#define SCM_SVC_SEC_WDOG_DIS 0x7
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#define MAX_CPU_CTX_SIZE 2048
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static struct msm_watchdog_data *wdog_data;
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static int cpu_idle_pc_state[NR_CPUS];
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struct msm_watchdog_data {
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unsigned int __iomem phys_base;
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size_t size;
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void __iomem *base;
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void __iomem *wdog_absent_base;
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struct device *dev;
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unsigned int pet_time;
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unsigned int bark_time;
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unsigned int bark_irq;
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unsigned int bite_irq;
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bool do_ipi_ping;
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bool wakeup_irq_enable;
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unsigned long long last_pet;
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unsigned min_slack_ticks;
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unsigned long long min_slack_ns;
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void *scm_regsave;
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cpumask_t alive_mask;
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struct mutex disable_lock;
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bool irq_ppi;
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struct msm_watchdog_data __percpu **wdog_cpu_dd;
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struct notifier_block panic_blk;
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bool enabled;
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struct task_struct *watchdog_task;
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struct timer_list pet_timer;
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struct completion pet_complete;
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};
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/*
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* On the kernel command line specify
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* watchdog_v2.enable=1 to enable the watchdog
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* By default watchdog is turned on
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*/
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static int enable = 1;
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module_param(enable, int, 0);
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#ifdef CONFIG_SEC_DEBUG
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static unsigned long cpu_buf_vaddr;
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static unsigned long cpu_buf_paddr;
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static unsigned long cpu_data_vaddr;
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static unsigned long cpu_data_paddr;
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static void __iomem * wdog_base_addr;
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static unsigned long long *plast_pet;
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extern void sec_debug_save_last_pet(unsigned long long last_pet);
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#endif
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/*
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* On the kernel command line specify
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* watchdog_v2.WDT_HZ=<clock val in HZ> to set Watchdog
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* ticks. By default it is set to 32765.
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*/
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static long WDT_HZ = 32765;
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module_param(WDT_HZ, long, 0);
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/*
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* On the kernel command line specify
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* watchdog_v2.ipi_opt_en=1 to enable the watchdog ipi ping
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* optimization. By default it is turned off
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*/
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static int ipi_opt_en;
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module_param(ipi_opt_en, int, 0);
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static void dump_cpu_alive_mask(struct msm_watchdog_data *wdog_dd)
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{
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static char alive_mask_buf[MASK_SIZE];
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cpulist_scnprintf(alive_mask_buf, MASK_SIZE,
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&wdog_dd->alive_mask);
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printk(KERN_INFO "cpu alive mask from last pet %s\n", alive_mask_buf);
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}
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static int msm_watchdog_suspend(struct device *dev)
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{
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struct msm_watchdog_data *wdog_dd =
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(struct msm_watchdog_data *)dev_get_drvdata(dev);
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if (!enable)
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return 0;
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__raw_writel(1, wdog_dd->base + WDT0_RST);
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if (wdog_dd->wakeup_irq_enable) {
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/* Make sure register write is complete before proceeding */
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mb();
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wdog_dd->last_pet = sched_clock();
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return 0;
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}
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__raw_writel(0, wdog_dd->base + WDT0_EN);
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mb();
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wdog_dd->enabled = false;
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wdog_dd->last_pet = sched_clock();
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return 0;
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}
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static int msm_watchdog_resume(struct device *dev)
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{
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struct msm_watchdog_data *wdog_dd =
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(struct msm_watchdog_data *)dev_get_drvdata(dev);
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if (!enable)
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return 0;
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if (wdog_dd->wakeup_irq_enable) {
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__raw_writel(1, wdog_dd->base + WDT0_RST);
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/* Make sure register write is complete before proceeding */
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mb();
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wdog_dd->last_pet = sched_clock();
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return 0;
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}
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__raw_writel(1, wdog_dd->base + WDT0_EN);
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__raw_writel(1, wdog_dd->base + WDT0_RST);
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mb();
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wdog_dd->enabled = true;
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wdog_dd->last_pet = sched_clock();
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return 0;
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}
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static int panic_wdog_handler(struct notifier_block *this,
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unsigned long event, void *ptr)
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{
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struct msm_watchdog_data *wdog_dd = container_of(this,
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struct msm_watchdog_data, panic_blk);
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if (panic_timeout == 0) {
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__raw_writel(0, wdog_dd->base + WDT0_EN);
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mb();
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} else {
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__raw_writel(WDT_HZ * (panic_timeout + 10),
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wdog_dd->base + WDT0_BARK_TIME);
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__raw_writel(WDT_HZ * (panic_timeout + 10),
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wdog_dd->base + WDT0_BITE_TIME);
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__raw_writel(1, wdog_dd->base + WDT0_RST);
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}
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return NOTIFY_DONE;
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}
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static void wdog_disable(struct msm_watchdog_data *wdog_dd)
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{
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__raw_writel(0, wdog_dd->base + WDT0_EN);
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mb();
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if (wdog_dd->irq_ppi) {
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disable_percpu_irq(wdog_dd->bark_irq);
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free_percpu_irq(wdog_dd->bark_irq, wdog_dd->wdog_cpu_dd);
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} else
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devm_free_irq(wdog_dd->dev, wdog_dd->bark_irq, wdog_dd);
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enable = 0;
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/*Ensure all cpus see update to enable*/
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smp_mb();
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atomic_notifier_chain_unregister(&panic_notifier_list,
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&wdog_dd->panic_blk);
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del_timer_sync(&wdog_dd->pet_timer);
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/* may be suspended after the first write above */
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__raw_writel(0, wdog_dd->base + WDT0_EN);
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mb();
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wdog_dd->enabled = false;
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pr_info("MSM Apps Watchdog deactivated.\n");
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}
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static ssize_t wdog_disable_get(struct device *dev,
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struct device_attribute *attr, char *buf)
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{
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int ret;
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struct msm_watchdog_data *wdog_dd = dev_get_drvdata(dev);
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mutex_lock(&wdog_dd->disable_lock);
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ret = snprintf(buf, PAGE_SIZE, "%d\n", enable == 0 ? 1 : 0);
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mutex_unlock(&wdog_dd->disable_lock);
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return ret;
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}
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static ssize_t wdog_disable_set(struct device *dev,
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struct device_attribute *attr,
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const char *buf, size_t count)
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{
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int ret;
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u8 disable;
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struct msm_watchdog_data *wdog_dd = dev_get_drvdata(dev);
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ret = kstrtou8(buf, 10, &disable);
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if (ret) {
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dev_err(wdog_dd->dev, "invalid user input\n");
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return ret;
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}
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if (disable == 1) {
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mutex_lock(&wdog_dd->disable_lock);
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if (enable == 0) {
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pr_info("MSM Apps Watchdog already disabled\n");
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mutex_unlock(&wdog_dd->disable_lock);
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return count;
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}
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disable = 1;
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if (!is_scm_armv8()) {
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ret = scm_call(SCM_SVC_BOOT, SCM_SVC_SEC_WDOG_DIS,
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&disable, sizeof(disable), NULL, 0);
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} else {
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struct scm_desc desc = {0};
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desc.args[0] = 1;
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desc.arginfo = SCM_ARGS(1);
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ret = scm_call2(SCM_SIP_FNID(SCM_SVC_BOOT,
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SCM_SVC_SEC_WDOG_DIS), &desc);
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}
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if (ret) {
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dev_err(wdog_dd->dev,
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"Failed to deactivate secure wdog\n");
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mutex_unlock(&wdog_dd->disable_lock);
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return -EIO;
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}
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wdog_disable(wdog_dd);
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mutex_unlock(&wdog_dd->disable_lock);
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} else {
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pr_err("invalid operation, only disable = 1 supported\n");
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return -EINVAL;
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}
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return count;
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}
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static DEVICE_ATTR(disable, S_IWUSR | S_IRUSR, wdog_disable_get,
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wdog_disable_set);
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#ifdef CONFIG_SEC_DEBUG
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static unsigned long long last_emerg_pet;
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void emerg_pet_watchdog(void)
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{
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if (wdog_base_addr && enable) {
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__raw_writel(1, wdog_base_addr + WDT0_EN);
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__raw_writel(1, wdog_base_addr + WDT0_RST);
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mb();
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last_emerg_pet = sched_clock();
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}
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}
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EXPORT_SYMBOL(emerg_pet_watchdog);
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#endif
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static void pet_watchdog(struct msm_watchdog_data *wdog_dd)
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{
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int slack, i, count, prev_count = 0, last_count = 0;
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unsigned long long time_ns;
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unsigned long long slack_ns;
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unsigned long long bark_time_ns = wdog_dd->bark_time * 1000000ULL;
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int wr_pending_status = 0;
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for (i = 0; i < 2; i++) {
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count = (__raw_readl(wdog_dd->base + WDT0_STS) >> 1) & 0xFFFFF;
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if (count != prev_count) {
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prev_count = count;
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i = 0;
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}
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}
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last_count = count;
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slack = ((wdog_dd->bark_time * WDT_HZ) / 1000) - count;
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if (slack < wdog_dd->min_slack_ticks)
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wdog_dd->min_slack_ticks = slack;
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__raw_writel(1, wdog_dd->base + WDT0_RST);
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time_ns = sched_clock();
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slack_ns = (wdog_dd->last_pet + bark_time_ns) - time_ns;
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if (slack_ns < wdog_dd->min_slack_ns)
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wdog_dd->min_slack_ns = slack_ns;
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wdog_dd->last_pet = time_ns;
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while ((wr_pending_status = __raw_readl(wdog_dd->base + 0x24)) & 0x1);
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for (i = 0; i < 2; i++) {
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count = (__raw_readl(wdog_dd->base + WDT0_STS) >> 1) & 0xFFFFF;
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if (count != prev_count) {
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prev_count = count;
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i = 0;
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}
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}
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pr_err("[%s] last_count : %x, new_count : %x, bark_time : %x, bite_time : %x\n", __func__, last_count, count, __raw_readl(wdog_dd->base + WDT0_BARK_TIME), __raw_readl(wdog_dd->base + WDT0_BITE_TIME));
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#ifdef CONFIG_SEC_DEBUG
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sec_debug_save_last_pet(time_ns);
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#endif
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}
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static void keep_alive_response(void *info)
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{
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int cpu = smp_processor_id();
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struct msm_watchdog_data *wdog_dd = (struct msm_watchdog_data *)info;
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cpumask_set_cpu(cpu, &wdog_dd->alive_mask);
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smp_mb();
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}
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/*
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* If this function does not return, it implies one of the
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* other cpu's is not responsive.
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*/
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static void ping_other_cpus(struct msm_watchdog_data *wdog_dd)
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{
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int cpu;
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cpumask_clear(&wdog_dd->alive_mask);
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smp_mb();
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for_each_cpu(cpu, cpu_online_mask) {
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if (!cpu_idle_pc_state[cpu])
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smp_call_function_single(cpu, keep_alive_response,
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wdog_dd, 1);
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}
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}
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static void pet_task_wakeup(unsigned long data)
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{
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struct msm_watchdog_data *wdog_dd =
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(struct msm_watchdog_data *)data;
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complete(&wdog_dd->pet_complete);
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}
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static __ref int watchdog_kthread(void *arg)
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{
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struct msm_watchdog_data *wdog_dd =
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(struct msm_watchdog_data *)arg;
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unsigned long delay_time;
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struct sched_param param = {.sched_priority = MAX_RT_PRIO-1};
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sched_setscheduler(current, SCHED_FIFO, ¶m);
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while (!kthread_should_stop()) {
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while (wait_for_completion_interruptible(
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&wdog_dd->pet_complete) != 0)
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;
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reinit_completion(&wdog_dd->pet_complete);
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if (enable) {
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delay_time = msecs_to_jiffies(wdog_dd->pet_time);
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if (wdog_dd->do_ipi_ping)
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ping_other_cpus(wdog_dd);
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pet_watchdog(wdog_dd);
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}
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/* Check again before scheduling *
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* Could have been changed on other cpu */
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mod_timer(&wdog_dd->pet_timer, jiffies + delay_time);
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}
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return 0;
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}
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static int wdog_cpu_pm_notify(struct notifier_block *self,
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unsigned long action, void *v)
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{
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int cpu;
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cpu = raw_smp_processor_id();
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switch (action) {
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case CPU_PM_ENTER:
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cpu_idle_pc_state[cpu] = 1;
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break;
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case CPU_PM_ENTER_FAILED:
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case CPU_PM_EXIT:
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cpu_idle_pc_state[cpu] = 0;
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break;
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}
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return NOTIFY_OK;
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}
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static struct notifier_block wdog_cpu_pm_nb = {
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.notifier_call = wdog_cpu_pm_notify,
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};
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static int msm_watchdog_remove(struct platform_device *pdev)
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{
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struct msm_watchdog_data *wdog_dd =
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(struct msm_watchdog_data *)platform_get_drvdata(pdev);
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if (ipi_opt_en)
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cpu_pm_unregister_notifier(&wdog_cpu_pm_nb);
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mutex_lock(&wdog_dd->disable_lock);
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if (enable) {
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wdog_disable(wdog_dd);
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}
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mutex_unlock(&wdog_dd->disable_lock);
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device_remove_file(wdog_dd->dev, &dev_attr_disable);
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if (wdog_dd->irq_ppi)
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free_percpu(wdog_dd->wdog_cpu_dd);
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printk(KERN_INFO "MSM Watchdog Exit - Deactivated\n");
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del_timer_sync(&wdog_dd->pet_timer);
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kthread_stop(wdog_dd->watchdog_task);
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kfree(wdog_dd);
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return 0;
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}
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void msm_trigger_wdog_bite(void)
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{
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if (!wdog_data)
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return;
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pr_info("Causing a watchdog bite!");
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__raw_writel(1, wdog_data->base + WDT0_BITE_TIME);
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mb();
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__raw_writel(1, wdog_data->base + WDT0_RST);
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mb();
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/* Delay to make sure bite occurs */
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mdelay(10000);
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pr_err("Wdog - STS: 0x%x, CTL: 0x%x, BARK TIME: 0x%x, BITE TIME: 0x%x",
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__raw_readl(wdog_data->base + WDT0_STS),
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__raw_readl(wdog_data->base + WDT0_EN),
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__raw_readl(wdog_data->base + WDT0_BARK_TIME),
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__raw_readl(wdog_data->base + WDT0_BITE_TIME));
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}
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static irqreturn_t wdog_bark_handler(int irq, void *dev_id)
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{
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struct msm_watchdog_data *wdog_dd = (struct msm_watchdog_data *)dev_id;
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unsigned long nanosec_rem;
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unsigned long long t = sched_clock();
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int i, count, prev_count;
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for (i = 0; i < 2; i++) {
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count = (__raw_readl(wdog_dd->base + WDT0_STS) >> 1) & 0xFFFFF;
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if (count != prev_count) {
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prev_count = count;
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i = 0;
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}
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}
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nanosec_rem = do_div(t, 1000000000);
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printk(KERN_INFO "Watchdog bark! Now = %lu.%06lu\n", (unsigned long) t,
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nanosec_rem / 1000);
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#ifdef CONFIG_SEC_DEBUG
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sec_debug_prepare_for_wdog_bark_reset();
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#endif
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|
nanosec_rem = do_div(wdog_dd->last_pet, 1000000000);
|
|
printk(KERN_INFO "Watchdog last pet at %lu.%06lu, count : %x\n", (unsigned long)
|
|
wdog_dd->last_pet, nanosec_rem / 1000, count);
|
|
pr_err("[%s] bark_time : %x, bite_time : %x\n", __func__, __raw_readl(wdog_dd->base + WDT0_BARK_TIME), __raw_readl(wdog_dd->base + WDT0_BITE_TIME));
|
|
|
|
if (wdog_dd->do_ipi_ping)
|
|
dump_cpu_alive_mask(wdog_dd);
|
|
msm_trigger_wdog_bite();
|
|
panic("Failed to cause a watchdog bite! - Falling back to kernel panic!");
|
|
return IRQ_HANDLED;
|
|
}
|
|
|
|
static irqreturn_t wdog_ppi_bark(int irq, void *dev_id)
|
|
{
|
|
struct msm_watchdog_data *wdog_dd =
|
|
*(struct msm_watchdog_data **)(dev_id);
|
|
return wdog_bark_handler(irq, wdog_dd);
|
|
}
|
|
|
|
#ifdef CONFIG_SEC_DEBUG_SUMMARY
|
|
int sec_debug_summary_set_msm_dump_info(struct sec_debug_summary_data_apss *apss)
|
|
{
|
|
apss->cpu_reg.msm_dump_info.cpu_data_paddr = cpu_data_paddr;
|
|
apss->cpu_reg.msm_dump_info.cpu_buf_paddr = cpu_buf_paddr;
|
|
apss->cpu_reg.msm_dump_info.cpu_ctx_size = MAX_CPU_CTX_SIZE;
|
|
apss->cpu_reg.msm_dump_info.offset = 0x10;
|
|
|
|
pr_info("cpu_data_paddr = 0x%llx\n", apss->cpu_reg.msm_dump_info.cpu_data_paddr);
|
|
pr_info("cpu_buf_paddr = 0x%llx\n", apss->cpu_reg.msm_dump_info.cpu_buf_paddr);
|
|
|
|
return 0;
|
|
}
|
|
#endif
|
|
|
|
#ifdef CONFIG_SEC_DEBUG
|
|
unsigned long get_wdog_regsave_paddr(void)
|
|
{
|
|
return __pa(&cpu_buf_paddr);
|
|
}
|
|
unsigned int get_last_pet_paddr(void)
|
|
{
|
|
#if 0 // MUST BE CHECK
|
|
return virt_to_phys(&wdog_dd->last_pet);
|
|
#else
|
|
return 0;
|
|
#endif
|
|
}
|
|
#endif
|
|
|
|
static void configure_bark_dump(struct msm_watchdog_data *wdog_dd)
|
|
{
|
|
int ret;
|
|
struct msm_client_dump cpu_dump_entry;
|
|
struct msm_dump_entry dump_entry;
|
|
struct msm_dump_data *cpu_data;
|
|
int cpu;
|
|
void *cpu_buf;
|
|
struct {
|
|
unsigned addr;
|
|
int len;
|
|
} cmd_buf;
|
|
struct scm_desc desc = {0};
|
|
|
|
if (MSM_DUMP_MAJOR(msm_dump_table_version()) == 1) {
|
|
wdog_dd->scm_regsave = (void *)__get_free_page(GFP_KERNEL);
|
|
if (wdog_dd->scm_regsave) {
|
|
/* scm_regsave may be a phys address > 4GB */
|
|
desc.args[0] = virt_to_phys(wdog_dd->scm_regsave);
|
|
cmd_buf.addr = virt_to_phys(wdog_dd->scm_regsave);
|
|
desc.args[1] = cmd_buf.len = PAGE_SIZE;
|
|
desc.arginfo = SCM_ARGS(2, SCM_RW, SCM_VAL);
|
|
|
|
if (!is_scm_armv8())
|
|
ret = scm_call(SCM_SVC_UTIL,
|
|
SCM_SET_REGSAVE_CMD, &cmd_buf,
|
|
sizeof(cmd_buf), NULL, 0);
|
|
else
|
|
ret = scm_call2(SCM_SIP_FNID(SCM_SVC_UTIL,
|
|
SCM_SET_REGSAVE_CMD), &desc);
|
|
if (ret)
|
|
pr_err("Setting register save address failed.\n"
|
|
"Registers won't be dumped on a dog "
|
|
"bite\n");
|
|
cpu_dump_entry.id = MSM_CPU_CTXT;
|
|
cpu_dump_entry.start_addr =
|
|
virt_to_phys(wdog_dd->scm_regsave);
|
|
cpu_dump_entry.end_addr = cpu_dump_entry.start_addr +
|
|
PAGE_SIZE;
|
|
ret = msm_dump_tbl_register(&cpu_dump_entry);
|
|
if (ret)
|
|
pr_err("Setting cpu dump region failed\n"
|
|
"Registers wont be dumped during cpu hang\n");
|
|
} else {
|
|
pr_err("Allocating register save space failed\n"
|
|
"Registers won't be dumped on a dog bite\n");
|
|
/*
|
|
* No need to bail if allocation fails. Simply don't
|
|
* send the command, and the secure side will reset
|
|
* without saving registers.
|
|
*/
|
|
}
|
|
} else {
|
|
cpu_data = kzalloc(sizeof(struct msm_dump_data) *
|
|
num_present_cpus(), GFP_KERNEL);
|
|
if (!cpu_data) {
|
|
pr_err("cpu dump data structure allocation failed\n");
|
|
goto out0;
|
|
}
|
|
cpu_buf = kzalloc(MAX_CPU_CTX_SIZE * num_present_cpus(),
|
|
GFP_KERNEL);
|
|
if (!cpu_buf) {
|
|
pr_err("cpu reg context space allocation failed\n");
|
|
goto out1;
|
|
}
|
|
#ifdef CONFIG_SEC_DEBUG
|
|
cpu_data_vaddr = (unsigned long)cpu_data;
|
|
cpu_data_paddr = (unsigned long)virt_to_phys(cpu_data);
|
|
cpu_buf_vaddr = (unsigned long)cpu_buf;
|
|
cpu_buf_paddr = (unsigned long)virt_to_phys(cpu_buf);
|
|
#endif
|
|
|
|
for_each_cpu(cpu, cpu_present_mask) {
|
|
cpu_data[cpu].addr = virt_to_phys(cpu_buf +
|
|
cpu * MAX_CPU_CTX_SIZE);
|
|
|
|
#ifdef CONFIG_SEC_DEBUG
|
|
pr_info("WDOG_V2 handled by TZ: for cpu[%d] @0x%llx PA:0x%lx\n",
|
|
cpu, cpu_data[cpu].addr,
|
|
(unsigned long)(cpu_buf + cpu * MAX_CPU_CTX_SIZE));
|
|
#endif
|
|
|
|
cpu_data[cpu].len = MAX_CPU_CTX_SIZE;
|
|
dump_entry.id = MSM_DUMP_DATA_CPU_CTX + cpu;
|
|
dump_entry.addr = virt_to_phys(&cpu_data[cpu]);
|
|
ret = msm_dump_data_register(MSM_DUMP_TABLE_APPS,
|
|
&dump_entry);
|
|
/*
|
|
* Don't free the buffers in case of error since
|
|
* registration may have succeeded for some cpus.
|
|
*/
|
|
if (ret)
|
|
pr_err("cpu %d reg dump setup failed\n", cpu);
|
|
}
|
|
}
|
|
|
|
return;
|
|
out1:
|
|
kfree(cpu_data);
|
|
out0:
|
|
return;
|
|
}
|
|
|
|
|
|
static void init_watchdog_data(struct msm_watchdog_data *wdog_dd)
|
|
{
|
|
unsigned long delay_time;
|
|
uint32_t val;
|
|
int error;
|
|
u64 timeout;
|
|
int ret;
|
|
|
|
/*
|
|
* Disable the watchdog for cluster 1 so that cluster 0 watchdog will
|
|
* be mapped to the entire sub-system.
|
|
*/
|
|
if (wdog_dd->wdog_absent_base)
|
|
__raw_writel(2, wdog_dd->wdog_absent_base + WDOG_ABSENT);
|
|
|
|
if (wdog_dd->irq_ppi) {
|
|
wdog_dd->wdog_cpu_dd = alloc_percpu(struct msm_watchdog_data *);
|
|
if (!wdog_dd->wdog_cpu_dd) {
|
|
dev_err(wdog_dd->dev, "fail to allocate cpu data\n");
|
|
return;
|
|
}
|
|
*raw_cpu_ptr(wdog_dd->wdog_cpu_dd) = wdog_dd;
|
|
ret = request_percpu_irq(wdog_dd->bark_irq, wdog_ppi_bark,
|
|
"apps_wdog_bark",
|
|
wdog_dd->wdog_cpu_dd);
|
|
if (ret) {
|
|
dev_err(wdog_dd->dev, "failed to request bark irq\n");
|
|
free_percpu(wdog_dd->wdog_cpu_dd);
|
|
return;
|
|
}
|
|
} else {
|
|
ret = devm_request_irq(wdog_dd->dev, wdog_dd->bark_irq,
|
|
wdog_bark_handler, IRQF_TRIGGER_RISING,
|
|
"apps_wdog_bark", wdog_dd);
|
|
if (ret) {
|
|
dev_err(wdog_dd->dev, "failed to request bark irq\n");
|
|
return;
|
|
}
|
|
}
|
|
delay_time = msecs_to_jiffies(wdog_dd->pet_time);
|
|
wdog_dd->min_slack_ticks = UINT_MAX;
|
|
wdog_dd->min_slack_ns = ULLONG_MAX;
|
|
configure_bark_dump(wdog_dd);
|
|
timeout = (wdog_dd->bark_time * WDT_HZ)/1000;
|
|
__raw_writel(timeout, wdog_dd->base + WDT0_BARK_TIME);
|
|
__raw_writel(timeout + 3*WDT_HZ, wdog_dd->base + WDT0_BITE_TIME);
|
|
|
|
wdog_dd->panic_blk.notifier_call = panic_wdog_handler;
|
|
atomic_notifier_chain_register(&panic_notifier_list,
|
|
&wdog_dd->panic_blk);
|
|
mutex_init(&wdog_dd->disable_lock);
|
|
init_completion(&wdog_dd->pet_complete);
|
|
wake_up_process(wdog_dd->watchdog_task);
|
|
init_timer(&wdog_dd->pet_timer);
|
|
wdog_dd->pet_timer.data = (unsigned long)wdog_dd;
|
|
wdog_dd->pet_timer.function = pet_task_wakeup;
|
|
wdog_dd->pet_timer.expires = jiffies + delay_time;
|
|
add_timer(&wdog_dd->pet_timer);
|
|
|
|
val = BIT(EN);
|
|
if (wdog_dd->wakeup_irq_enable)
|
|
val |= BIT(UNMASKED_INT_EN);
|
|
__raw_writel(val, wdog_dd->base + WDT0_EN);
|
|
__raw_writel(1, wdog_dd->base + WDT0_RST);
|
|
wdog_dd->last_pet = sched_clock();
|
|
wdog_dd->enabled = true;
|
|
#ifdef CONFIG_SEC_DEBUG
|
|
plast_pet = &(wdog_dd->last_pet);
|
|
sec_debug_save_last_pet(wdog_dd->last_pet);
|
|
#endif
|
|
|
|
error = device_create_file(wdog_dd->dev, &dev_attr_disable);
|
|
if (error)
|
|
dev_err(wdog_dd->dev, "cannot create sysfs attribute\n");
|
|
if (wdog_dd->irq_ppi)
|
|
enable_percpu_irq(wdog_dd->bark_irq, 0);
|
|
if (ipi_opt_en)
|
|
cpu_pm_register_notifier(&wdog_cpu_pm_nb);
|
|
dev_info(wdog_dd->dev, "MSM Watchdog Initialized\n");
|
|
return;
|
|
}
|
|
|
|
static struct of_device_id msm_wdog_match_table[] = {
|
|
{ .compatible = "qcom,msm-watchdog" },
|
|
{}
|
|
};
|
|
|
|
static void dump_pdata(struct msm_watchdog_data *pdata)
|
|
{
|
|
dev_dbg(pdata->dev, "wdog bark_time %d", pdata->bark_time);
|
|
dev_dbg(pdata->dev, "wdog pet_time %d", pdata->pet_time);
|
|
dev_dbg(pdata->dev, "wdog perform ipi ping %d", pdata->do_ipi_ping);
|
|
dev_dbg(pdata->dev, "wdog base address is 0x%lx\n", (unsigned long)
|
|
pdata->base);
|
|
}
|
|
|
|
#if CONFIG_SEC_BSP
|
|
extern int console_enabled;
|
|
#endif
|
|
|
|
static int msm_wdog_dt_to_pdata(struct platform_device *pdev,
|
|
struct msm_watchdog_data *pdata)
|
|
{
|
|
struct device_node *node = pdev->dev.of_node;
|
|
struct resource *res;
|
|
int ret;
|
|
|
|
res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "wdt-base");
|
|
if (!res)
|
|
return -ENODEV;
|
|
pdata->size = resource_size(res);
|
|
pdata->phys_base = res->start;
|
|
if (unlikely(!(devm_request_mem_region(&pdev->dev, pdata->phys_base,
|
|
pdata->size, "msm-watchdog")))) {
|
|
|
|
dev_err(&pdev->dev, "%s cannot reserve watchdog region\n",
|
|
__func__);
|
|
return -ENXIO;
|
|
}
|
|
pdata->base = devm_ioremap(&pdev->dev, pdata->phys_base,
|
|
pdata->size);
|
|
if (!pdata->base) {
|
|
dev_err(&pdev->dev, "%s cannot map wdog register space\n",
|
|
__func__);
|
|
return -ENXIO;
|
|
}
|
|
|
|
res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
|
|
"wdt-absent-base");
|
|
if (res) {
|
|
pdata->wdog_absent_base = devm_ioremap(&pdev->dev, res->start,
|
|
resource_size(res));
|
|
if (!pdata->wdog_absent_base) {
|
|
dev_err(&pdev->dev,
|
|
"cannot map wdog absent register space\n");
|
|
return -ENXIO;
|
|
}
|
|
} else {
|
|
dev_info(&pdev->dev, "wdog absent resource not present\n");
|
|
}
|
|
|
|
pdata->bark_irq = platform_get_irq(pdev, 0);
|
|
pdata->bite_irq = platform_get_irq(pdev, 1);
|
|
ret = of_property_read_u32(node, "qcom,bark-time", &pdata->bark_time);
|
|
if (ret) {
|
|
dev_err(&pdev->dev, "reading bark time failed\n");
|
|
return -ENXIO;
|
|
}
|
|
#if CONFIG_SEC_BSP
|
|
if (console_enabled) {
|
|
pdata->bark_time += 10000; // add 10 seconds
|
|
dev_info(&pdev->dev,
|
|
"console_enabled : wdog bark time added 10 sec.-> %d\n",
|
|
pdata->bark_time);
|
|
}
|
|
#endif
|
|
ret = of_property_read_u32(node, "qcom,pet-time", &pdata->pet_time);
|
|
if (ret) {
|
|
dev_err(&pdev->dev, "reading pet time failed\n");
|
|
return -ENXIO;
|
|
}
|
|
pdata->do_ipi_ping = of_property_read_bool(node, "qcom,ipi-ping");
|
|
if (!pdata->bark_time) {
|
|
dev_err(&pdev->dev, "%s watchdog bark time not setup\n",
|
|
__func__);
|
|
return -ENXIO;
|
|
}
|
|
if (!pdata->pet_time) {
|
|
dev_err(&pdev->dev, "%s watchdog pet time not setup\n",
|
|
__func__);
|
|
return -ENXIO;
|
|
}
|
|
pdata->wakeup_irq_enable = of_property_read_bool(node,
|
|
"qcom,wakeup-enable");
|
|
|
|
pdata->irq_ppi = irq_is_percpu(pdata->bark_irq);
|
|
dump_pdata(pdata);
|
|
return 0;
|
|
}
|
|
|
|
static int msm_watchdog_probe(struct platform_device *pdev)
|
|
{
|
|
int ret;
|
|
struct msm_watchdog_data *wdog_dd;
|
|
|
|
if (!pdev->dev.of_node || !enable)
|
|
return -ENODEV;
|
|
wdog_dd = kzalloc(sizeof(struct msm_watchdog_data), GFP_KERNEL);
|
|
if (!wdog_dd)
|
|
return -EIO;
|
|
ret = msm_wdog_dt_to_pdata(pdev, wdog_dd);
|
|
if (ret)
|
|
goto err;
|
|
|
|
wdog_data = wdog_dd;
|
|
wdog_dd->dev = &pdev->dev;
|
|
platform_set_drvdata(pdev, wdog_dd);
|
|
cpumask_clear(&wdog_dd->alive_mask);
|
|
wdog_dd->watchdog_task = kthread_create(watchdog_kthread, wdog_dd,
|
|
"msm_watchdog");
|
|
if (IS_ERR(wdog_dd->watchdog_task)) {
|
|
ret = PTR_ERR(wdog_dd->watchdog_task);
|
|
goto err;
|
|
}
|
|
init_watchdog_data(wdog_dd);
|
|
return 0;
|
|
err:
|
|
kzfree(wdog_dd);
|
|
return ret;
|
|
}
|
|
|
|
static const struct dev_pm_ops msm_watchdog_dev_pm_ops = {
|
|
.suspend_noirq = msm_watchdog_suspend,
|
|
.resume_noirq = msm_watchdog_resume,
|
|
};
|
|
|
|
static struct platform_driver msm_watchdog_driver = {
|
|
.probe = msm_watchdog_probe,
|
|
.remove = msm_watchdog_remove,
|
|
.driver = {
|
|
.name = MODULE_NAME,
|
|
.owner = THIS_MODULE,
|
|
.pm = &msm_watchdog_dev_pm_ops,
|
|
.of_match_table = msm_wdog_match_table,
|
|
},
|
|
};
|
|
|
|
static int init_watchdog(void)
|
|
{
|
|
return platform_driver_register(&msm_watchdog_driver);
|
|
}
|
|
|
|
pure_initcall(init_watchdog);
|
|
MODULE_DESCRIPTION("MSM Watchdog Driver");
|
|
MODULE_LICENSE("GPL v2");
|