227 lines
6.7 KiB
Text
227 lines
6.7 KiB
Text
/* Copyright (c) 2015, The Linux Foundation. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 and
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* only version 2 as published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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&soc {
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mdss_mdp: qcom,mdss_mdp@1a00000 {
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compatible = "qcom,mdss_mdp";
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reg = <0x1a00000 0x90000>,
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<0x1ac8000 0x3000>;
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reg-names = "mdp_phys", "vbif_phys";
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interrupts = <0 72 0>;
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vdd-supply = <&gdsc_mdss>;
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/* Bus Scale Settings */
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qcom,msm-bus,name = "mdss_mdp";
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qcom,msm-bus,num-cases = <3>;
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qcom,msm-bus,num-paths = <1>;
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qcom,msm-bus,vectors-KBps =
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<22 512 0 0>,
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<22 512 0 6400000>,
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<22 512 0 6400000>;
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/* Fudge factors */
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qcom,mdss-ab-factor = <1 1>; /* 1 time */
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qcom,mdss-ib-factor = <2 1>; /* 2 times */
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qcom,mdss-ib-factor-cmd = <10 6>; /* 1.6 times */
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qcom,mdss-clk-factor = <105 100>; /* 1.05 times */
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qcom,max-bandwidth-low-kbps = <2000000>;
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qcom,max-bandwidth-high-kbps = <2000000>;
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qcom,max-bandwidth-per-pipe-kbps = <1500000>;
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/* VBIF QoS remapper settings*/
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qcom,mdss-vbif-qos-rt-setting = <2 2 2 2>;
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qcom,mdss-vbif-qos-nrt-setting = <1 1 1 1>;
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qcom,max-mixer-width = <2048>;
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qcom,mdss-mdp-reg-offset = <0x00001000>;
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qcom,max-clk-rate = <320000000>;
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qcom,mdss-pipe-vig-off = <0x00005000>;
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qcom,mdss-pipe-rgb-off = <0x00015000 0x00017000>;
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qcom,mdss-pipe-dma-off = <0x00025000>;
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qcom,mdss-pipe-vig-fetch-id = <1>;
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qcom,mdss-pipe-rgb-fetch-id = <7 8>;
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qcom,mdss-pipe-dma-fetch-id = <4>;
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qcom,mdss-default-ot-wr-limit = <16>;
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qcom,mdss-default-ot-rd-limit = <16>;
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qcom,mdss-pipe-vig-xin-id = <0>;
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qcom,mdss-pipe-rgb-xin-id = <1 5>;
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qcom,mdss-pipe-dma-xin-id = <2>;
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qcom,mdss-has-panic-ctrl;
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/* Panic/robust control register offsets for pipes */
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qcom,mdss-pipe-vig-panic-ctrl-offsets = <0>;
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qcom,mdss-pipe-rgb-panic-ctrl-offsets = <4 5>;
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qcom,mdss-pipe-dma-panic-ctrl-offsets = <8>;
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qcom,mdss-pipe-vig-clk-ctrl-offsets = <0x2ac 0 0>;
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qcom,mdss-pipe-rgb-clk-ctrl-offsets = <0x2ac 4 8>,
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<0x2b4 4 8>;
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qcom,mdss-pipe-dma-clk-ctrl-offsets = <0x2ac 8 12>;
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qcom,mdss-smp-data = <12 8192>;
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qcom,mdss-ctl-off = <0x00002000 0x00002200 0x00002400>;
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qcom,mdss-mixer-intf-off = <0x00045000>;
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qcom,mdss-mixer-wb-off = <0x00048000>;
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qcom,mdss-dspp-off = <0x00055000>;
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qcom,mdss-pingpong-off = <0x00071000>;
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qcom,mdss-wb-off = <0x00065000 0x00065800 0x00066000>;
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qcom,mdss-intf-off = <0x00000000 0x0006b800>;
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qcom,mdss-rot-block-size = <64>;
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qcom,mdss-wfd-mode = "dedicated";
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qcom,mdss-has-non-scalar-rgb;
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qcom,mdss-has-decimation;
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qcom,mdss-no-hist-vote;
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qcom,mdss-needs-iommu-bw-vote;
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clocks = <&clock_gcc clk_gcc_mdss_ahb_clk>,
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<&clock_gcc clk_gcc_mdss_axi_clk>,
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<&clock_gcc clk_mdp_clk_src>,
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<&clock_gcc clk_gcc_mdss_mdp_clk>,
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<&clock_gcc clk_gcc_mdss_vsync_clk>;
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clock-names = "iface_clk", "bus_clk", "core_clk_src",
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"core_clk", "vsync_clk";
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qcom,mdp-settings = <0x000011e4 0x00000000>,
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<0x00065048 0x00000008>,
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<0x00065848 0x00000008>,
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<0x00066048 0x00000008>;
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/* buffer parameters to calculate prefill bandwidth */
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qcom,mdss-prefill-outstanding-buffer-bytes = <1024>;
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qcom,mdss-prefill-y-buffer-bytes = <0>;
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qcom,mdss-prefill-scaler-buffer-lines-bilinear = <2>;
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qcom,mdss-prefill-scaler-buffer-lines-caf = <4>;
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qcom,mdss-prefill-post-scaler-buffer-pixels = <0>;
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qcom,mdss-prefill-pingpong-buffer-pixels = <4096>;
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qcom,mdss-prefill-fbc-lines = <0>;
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mdss_fb0: qcom,mdss_fb_primary {
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cell-index = <0>;
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compatible = "qcom,mdss-fb";
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qcom,cont-splash-memory {
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linux,contiguous-region = <&cont_splash_mem>;
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};
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};
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mdss_fb1: qcom,mdss_fb_wfd {
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cell-index = <1>;
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compatible = "qcom,mdss-fb";
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};
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};
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mdss_dsi: qcom,mdss_dsi@0 {
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compatible = "qcom,mdss-dsi";
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hw-config = "single_dsi";
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#address-cells = <1>;
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#size-cells = <1>;
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gdsc-supply = <&gdsc_mdss>;
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vdda-supply = <&pm8950_l2>;
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vddio-supply = <&pm8950_l6>;
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ranges = <0x1a98000 0x1a98000 0x25c
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0x1a98500 0x1a98500 0x280
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0x1a98780 0x1a98780 0x30
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0x193e000 0x193e000 0x30>;
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clocks = <&clock_gcc clk_gcc_mdss_mdp_clk>,
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<&clock_gcc clk_gcc_mdss_ahb_clk>,
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<&clock_gcc clk_gcc_mdss_axi_clk>;
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clock-names = "mdp_core_clk", "iface_clk", "bus_clk";
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qcom,timing-db-mode;
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qcom,core-supply-entries {
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#address-cells = <1>;
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#size-cells = <0>;
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qcom,core-supply-entry@0 {
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reg = <0>;
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qcom,supply-name = "gdsc";
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qcom,supply-min-voltage = <0>;
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qcom,supply-max-voltage = <0>;
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qcom,supply-enable-load = <0>;
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qcom,supply-disable-load = <0>;
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};
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};
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qcom,ctrl-supply-entries {
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#address-cells = <1>;
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#size-cells = <0>;
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qcom,ctrl-supply-entry@0 {
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reg = <0>;
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qcom,supply-name = "vdda";
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qcom,supply-min-voltage = <1200000>;
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qcom,supply-max-voltage = <1200000>;
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qcom,supply-enable-load = <100000>;
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qcom,supply-disable-load = <100>;
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qcom,supply-post-on-sleep = <20>;
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};
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};
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qcom,phy-supply-entries {
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#address-cells = <1>;
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#size-cells = <0>;
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qcom,phy-supply-entry@0 {
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reg = <0>;
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qcom,supply-name = "vddio";
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qcom,supply-min-voltage = <1800000>;
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qcom,supply-max-voltage = <1800000>;
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qcom,supply-enable-load = <100000>;
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qcom,supply-disable-load = <100>;
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};
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};
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mdss_dsi0: qcom,mdss_dsi_ctrl0@1a98000 {
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compatible = "qcom,mdss-dsi-ctrl";
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label = "MDSS DSI CTRL->0";
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cell-index = <0>;
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reg = <0x1a98000 0x25c>,
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<0x1a98500 0x280>,
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<0x1a98780 0x30>,
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<0x193e000 0x30>;
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reg-names = "dsi_ctrl", "dsi_phy",
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"dsi_phy_regulator", "mmss_misc_phys";
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qcom,mdss-fb-map = <&mdss_fb0>;
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qcom,mdss-mdp = <&mdss_mdp>;
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vdd-supply = <&pm8950_l17>;
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vddio-supply = <&pm8950_l6>;
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lab-supply = <&lab_regulator>;
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ibb-supply = <&ibb_regulator>;
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clocks = <&clock_gcc_mdss clk_gcc_mdss_byte0_clk>,
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<&clock_gcc_mdss clk_gcc_mdss_pclk0_clk>,
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<&clock_gcc clk_gcc_mdss_esc0_clk>;
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clock-names = "byte_clk", "pixel_clk", "core_clk";
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qcom,platform-strength-ctrl = [ff 06];
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qcom,platform-bist-ctrl = [00 00 b1 ff 00 00];
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qcom,platform-regulator-settings = [03 08 07 00 20 07 01];
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qcom,platform-lane-config = [00 00 00 00 00 00 00 01 97
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00 00 00 00 00 00 00 01 97
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00 00 00 00 00 00 00 01 97
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00 00 00 00 00 00 00 01 97
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00 c0 00 00 00 00 00 01 bb];
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};
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};
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qcom,mdss_wb_panel {
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compatible = "qcom,mdss_wb";
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qcom,mdss_pan_res = <1280 720>;
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qcom,mdss_pan_bpp = <24>;
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qcom,mdss-fb-map = <&mdss_fb1>;
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};
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};
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#include "msm8952-mdss-panels.dtsi"
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