628 lines
17 KiB
C
628 lines
17 KiB
C
/*
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* Controls for M-5MOLS 8M Pixel camera sensor with ISP
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*
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* Copyright (C) 2011 Samsung Electronics Co., Ltd.
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* Author: HeungJun Kim <riverful.kim@samsung.com>
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*
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* Copyright (C) 2009 Samsung Electronics Co., Ltd.
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* Author: Dongsoo Nathaniel Kim <dongsoo45.kim@samsung.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*/
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#include <linux/i2c.h>
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#include <linux/delay.h>
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#include <linux/videodev2.h>
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#include <media/v4l2-ctrls.h>
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#include "m5mols.h"
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#include "m5mols_reg.h"
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static struct m5mols_scenemode m5mols_default_scenemode[] = {
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[REG_SCENE_NORMAL] = {
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REG_AE_CENTER, REG_AE_INDEX_00, REG_AWB_AUTO, 0,
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REG_CHROMA_ON, 3, REG_EDGE_ON, 5,
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REG_AF_NORMAL, REG_FD_OFF,
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REG_MCC_NORMAL, REG_LIGHT_OFF, REG_FLASH_OFF,
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5, REG_ISO_AUTO, REG_CAP_NONE, REG_WDR_OFF,
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},
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[REG_SCENE_PORTRAIT] = {
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REG_AE_CENTER, REG_AE_INDEX_00, REG_AWB_AUTO, 0,
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REG_CHROMA_ON, 3, REG_EDGE_ON, 4,
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REG_AF_NORMAL, BIT_FD_EN | BIT_FD_DRAW_FACE_FRAME,
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REG_MCC_OFF, REG_LIGHT_OFF, REG_FLASH_OFF,
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6, REG_ISO_AUTO, REG_CAP_NONE, REG_WDR_OFF,
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},
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[REG_SCENE_LANDSCAPE] = {
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REG_AE_ALL, REG_AE_INDEX_00, REG_AWB_AUTO, 0,
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REG_CHROMA_ON, 4, REG_EDGE_ON, 6,
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REG_AF_NORMAL, REG_FD_OFF,
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REG_MCC_OFF, REG_LIGHT_OFF, REG_FLASH_OFF,
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6, REG_ISO_AUTO, REG_CAP_NONE, REG_WDR_OFF,
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},
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[REG_SCENE_SPORTS] = {
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REG_AE_CENTER, REG_AE_INDEX_00, REG_AWB_AUTO, 0,
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REG_CHROMA_ON, 3, REG_EDGE_ON, 5,
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REG_AF_NORMAL, REG_FD_OFF,
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REG_MCC_OFF, REG_LIGHT_OFF, REG_FLASH_OFF,
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6, REG_ISO_AUTO, REG_CAP_NONE, REG_WDR_OFF,
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},
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[REG_SCENE_PARTY_INDOOR] = {
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REG_AE_CENTER, REG_AE_INDEX_00, REG_AWB_AUTO, 0,
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REG_CHROMA_ON, 4, REG_EDGE_ON, 5,
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REG_AF_NORMAL, REG_FD_OFF,
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REG_MCC_OFF, REG_LIGHT_OFF, REG_FLASH_OFF,
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6, REG_ISO_200, REG_CAP_NONE, REG_WDR_OFF,
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},
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[REG_SCENE_BEACH_SNOW] = {
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REG_AE_CENTER, REG_AE_INDEX_10_POS, REG_AWB_AUTO, 0,
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REG_CHROMA_ON, 4, REG_EDGE_ON, 5,
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REG_AF_NORMAL, REG_FD_OFF,
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REG_MCC_OFF, REG_LIGHT_OFF, REG_FLASH_OFF,
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6, REG_ISO_50, REG_CAP_NONE, REG_WDR_OFF,
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},
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[REG_SCENE_SUNSET] = {
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REG_AE_CENTER, REG_AE_INDEX_00, REG_AWB_PRESET,
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REG_AWB_DAYLIGHT,
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REG_CHROMA_ON, 3, REG_EDGE_ON, 5,
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REG_AF_NORMAL, REG_FD_OFF,
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REG_MCC_OFF, REG_LIGHT_OFF, REG_FLASH_OFF,
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6, REG_ISO_AUTO, REG_CAP_NONE, REG_WDR_OFF,
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},
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[REG_SCENE_DAWN_DUSK] = {
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REG_AE_CENTER, REG_AE_INDEX_00, REG_AWB_PRESET,
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REG_AWB_FLUORESCENT_1,
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REG_CHROMA_ON, 3, REG_EDGE_ON, 5,
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REG_AF_NORMAL, REG_FD_OFF,
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REG_MCC_OFF, REG_LIGHT_OFF, REG_FLASH_OFF,
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6, REG_ISO_AUTO, REG_CAP_NONE, REG_WDR_OFF,
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},
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[REG_SCENE_FALL] = {
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REG_AE_CENTER, REG_AE_INDEX_00, REG_AWB_AUTO, 0,
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REG_CHROMA_ON, 5, REG_EDGE_ON, 5,
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REG_AF_NORMAL, REG_FD_OFF,
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REG_MCC_OFF, REG_LIGHT_OFF, REG_FLASH_OFF,
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6, REG_ISO_AUTO, REG_CAP_NONE, REG_WDR_OFF,
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},
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[REG_SCENE_NIGHT] = {
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REG_AE_CENTER, REG_AE_INDEX_00, REG_AWB_AUTO, 0,
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REG_CHROMA_ON, 3, REG_EDGE_ON, 5,
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REG_AF_NORMAL, REG_FD_OFF,
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REG_MCC_OFF, REG_LIGHT_OFF, REG_FLASH_OFF,
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6, REG_ISO_AUTO, REG_CAP_NONE, REG_WDR_OFF,
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},
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[REG_SCENE_AGAINST_LIGHT] = {
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REG_AE_CENTER, REG_AE_INDEX_00, REG_AWB_AUTO, 0,
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REG_CHROMA_ON, 3, REG_EDGE_ON, 5,
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REG_AF_NORMAL, REG_FD_OFF,
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REG_MCC_OFF, REG_LIGHT_OFF, REG_FLASH_OFF,
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6, REG_ISO_AUTO, REG_CAP_NONE, REG_WDR_OFF,
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},
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[REG_SCENE_FIRE] = {
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REG_AE_CENTER, REG_AE_INDEX_00, REG_AWB_AUTO, 0,
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REG_CHROMA_ON, 3, REG_EDGE_ON, 5,
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REG_AF_NORMAL, REG_FD_OFF,
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REG_MCC_OFF, REG_LIGHT_OFF, REG_FLASH_OFF,
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6, REG_ISO_50, REG_CAP_NONE, REG_WDR_OFF,
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},
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[REG_SCENE_TEXT] = {
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REG_AE_CENTER, REG_AE_INDEX_00, REG_AWB_AUTO, 0,
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REG_CHROMA_ON, 3, REG_EDGE_ON, 7,
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REG_AF_MACRO, REG_FD_OFF,
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REG_MCC_OFF, REG_LIGHT_OFF, REG_FLASH_OFF,
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6, REG_ISO_AUTO, REG_CAP_ANTI_SHAKE, REG_WDR_ON,
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},
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[REG_SCENE_CANDLE] = {
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REG_AE_CENTER, REG_AE_INDEX_00, REG_AWB_AUTO, 0,
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REG_CHROMA_ON, 3, REG_EDGE_ON, 5,
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REG_AF_NORMAL, REG_FD_OFF,
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REG_MCC_OFF, REG_LIGHT_OFF, REG_FLASH_OFF,
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6, REG_ISO_AUTO, REG_CAP_NONE, REG_WDR_OFF,
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},
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};
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/**
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* m5mols_do_scenemode() - Change current scenemode
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* @mode: Desired mode of the scenemode
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*
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* WARNING: The execution order is important. Do not change the order.
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*/
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int m5mols_do_scenemode(struct m5mols_info *info, u8 mode)
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{
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struct v4l2_subdev *sd = &info->sd;
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struct m5mols_scenemode scenemode = m5mols_default_scenemode[mode];
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int ret;
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if (mode > REG_SCENE_CANDLE)
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return -EINVAL;
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ret = v4l2_ctrl_s_ctrl(info->lock_3a, 0);
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if (!ret)
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ret = m5mols_write(sd, AE_EV_PRESET_MONITOR, mode);
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if (!ret)
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ret = m5mols_write(sd, AE_EV_PRESET_CAPTURE, mode);
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if (!ret)
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ret = m5mols_write(sd, AE_MODE, scenemode.metering);
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if (!ret)
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ret = m5mols_write(sd, AE_INDEX, scenemode.ev_bias);
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if (!ret)
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ret = m5mols_write(sd, AWB_MODE, scenemode.wb_mode);
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if (!ret)
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ret = m5mols_write(sd, AWB_MANUAL, scenemode.wb_preset);
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if (!ret)
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ret = m5mols_write(sd, MON_CHROMA_EN, scenemode.chroma_en);
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if (!ret)
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ret = m5mols_write(sd, MON_CHROMA_LVL, scenemode.chroma_lvl);
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if (!ret)
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ret = m5mols_write(sd, MON_EDGE_EN, scenemode.edge_en);
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if (!ret)
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ret = m5mols_write(sd, MON_EDGE_LVL, scenemode.edge_lvl);
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if (!ret && is_available_af(info))
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ret = m5mols_write(sd, AF_MODE, scenemode.af_range);
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if (!ret && is_available_af(info))
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ret = m5mols_write(sd, FD_CTL, scenemode.fd_mode);
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if (!ret)
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ret = m5mols_write(sd, MON_TONE_CTL, scenemode.tone);
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if (!ret)
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ret = m5mols_write(sd, AE_ISO, scenemode.iso);
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if (!ret)
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ret = m5mols_set_mode(info, REG_CAPTURE);
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if (!ret)
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ret = m5mols_write(sd, CAPP_WDR_EN, scenemode.wdr);
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if (!ret)
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ret = m5mols_write(sd, CAPP_MCC_MODE, scenemode.mcc);
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if (!ret)
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ret = m5mols_write(sd, CAPP_LIGHT_CTRL, scenemode.light);
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if (!ret)
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ret = m5mols_write(sd, CAPP_FLASH_CTRL, scenemode.flash);
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if (!ret)
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ret = m5mols_write(sd, CAPC_MODE, scenemode.capt_mode);
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if (!ret)
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ret = m5mols_set_mode(info, REG_MONITOR);
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return ret;
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}
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static int m5mols_3a_lock(struct m5mols_info *info, struct v4l2_ctrl *ctrl)
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{
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bool af_lock = ctrl->val & V4L2_LOCK_FOCUS;
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int ret = 0;
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if ((ctrl->val ^ ctrl->cur.val) & V4L2_LOCK_EXPOSURE) {
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bool ae_lock = ctrl->val & V4L2_LOCK_EXPOSURE;
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ret = m5mols_write(&info->sd, AE_LOCK, ae_lock ?
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REG_AE_LOCK : REG_AE_UNLOCK);
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if (ret)
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return ret;
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}
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if (((ctrl->val ^ ctrl->cur.val) & V4L2_LOCK_WHITE_BALANCE)
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&& info->auto_wb->val) {
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bool awb_lock = ctrl->val & V4L2_LOCK_WHITE_BALANCE;
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ret = m5mols_write(&info->sd, AWB_LOCK, awb_lock ?
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REG_AWB_LOCK : REG_AWB_UNLOCK);
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if (ret)
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return ret;
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}
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if (!info->ver.af || !af_lock)
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return ret;
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if ((ctrl->val ^ ctrl->cur.val) & V4L2_LOCK_FOCUS)
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ret = m5mols_write(&info->sd, AF_EXECUTE, REG_AF_STOP);
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return ret;
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}
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static int m5mols_set_metering_mode(struct m5mols_info *info, int mode)
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{
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unsigned int metering;
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switch (mode) {
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case V4L2_EXPOSURE_METERING_CENTER_WEIGHTED:
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metering = REG_AE_CENTER;
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break;
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case V4L2_EXPOSURE_METERING_SPOT:
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metering = REG_AE_SPOT;
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break;
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default:
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metering = REG_AE_ALL;
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break;
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}
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return m5mols_write(&info->sd, AE_MODE, metering);
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}
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static int m5mols_set_exposure(struct m5mols_info *info, int exposure)
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{
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struct v4l2_subdev *sd = &info->sd;
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int ret = 0;
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if (exposure == V4L2_EXPOSURE_AUTO) {
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/* Unlock auto exposure */
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info->lock_3a->val &= ~V4L2_LOCK_EXPOSURE;
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m5mols_3a_lock(info, info->lock_3a);
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ret = m5mols_set_metering_mode(info, info->metering->val);
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if (ret < 0)
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return ret;
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v4l2_dbg(1, m5mols_debug, sd,
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"%s: exposure bias: %#x, metering: %#x\n",
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__func__, info->exposure_bias->val,
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info->metering->val);
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return m5mols_write(sd, AE_INDEX, info->exposure_bias->val);
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}
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if (exposure == V4L2_EXPOSURE_MANUAL) {
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ret = m5mols_write(sd, AE_MODE, REG_AE_OFF);
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if (ret == 0)
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ret = m5mols_write(sd, AE_MAN_GAIN_MON,
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info->exposure->val);
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if (ret == 0)
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ret = m5mols_write(sd, AE_MAN_GAIN_CAP,
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info->exposure->val);
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v4l2_dbg(1, m5mols_debug, sd, "%s: exposure: %#x\n",
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__func__, info->exposure->val);
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}
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return ret;
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}
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static int m5mols_set_white_balance(struct m5mols_info *info, int val)
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{
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static const unsigned short wb[][2] = {
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{ V4L2_WHITE_BALANCE_INCANDESCENT, REG_AWB_INCANDESCENT },
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{ V4L2_WHITE_BALANCE_FLUORESCENT, REG_AWB_FLUORESCENT_1 },
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{ V4L2_WHITE_BALANCE_FLUORESCENT_H, REG_AWB_FLUORESCENT_2 },
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{ V4L2_WHITE_BALANCE_HORIZON, REG_AWB_HORIZON },
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{ V4L2_WHITE_BALANCE_DAYLIGHT, REG_AWB_DAYLIGHT },
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{ V4L2_WHITE_BALANCE_FLASH, REG_AWB_LEDLIGHT },
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{ V4L2_WHITE_BALANCE_CLOUDY, REG_AWB_CLOUDY },
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{ V4L2_WHITE_BALANCE_SHADE, REG_AWB_SHADE },
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{ V4L2_WHITE_BALANCE_AUTO, REG_AWB_AUTO },
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};
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int i;
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struct v4l2_subdev *sd = &info->sd;
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int ret = -EINVAL;
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for (i = 0; i < ARRAY_SIZE(wb); i++) {
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int awb;
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if (wb[i][0] != val)
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continue;
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v4l2_dbg(1, m5mols_debug, sd,
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"Setting white balance to: %#x\n", wb[i][0]);
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awb = wb[i][0] == V4L2_WHITE_BALANCE_AUTO;
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ret = m5mols_write(sd, AWB_MODE, awb ? REG_AWB_AUTO :
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REG_AWB_PRESET);
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if (ret < 0)
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return ret;
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if (!awb)
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ret = m5mols_write(sd, AWB_MANUAL, wb[i][1]);
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}
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return ret;
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}
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static int m5mols_set_saturation(struct m5mols_info *info, int val)
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{
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int ret = m5mols_write(&info->sd, MON_CHROMA_LVL, val);
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if (ret < 0)
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return ret;
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return m5mols_write(&info->sd, MON_CHROMA_EN, REG_CHROMA_ON);
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}
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static int m5mols_set_color_effect(struct m5mols_info *info, int val)
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{
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unsigned int m_effect = REG_COLOR_EFFECT_OFF;
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unsigned int p_effect = REG_EFFECT_OFF;
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unsigned int cfix_r = 0, cfix_b = 0;
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struct v4l2_subdev *sd = &info->sd;
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int ret = 0;
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switch (val) {
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case V4L2_COLORFX_BW:
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m_effect = REG_COLOR_EFFECT_ON;
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break;
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case V4L2_COLORFX_NEGATIVE:
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p_effect = REG_EFFECT_NEGA;
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break;
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case V4L2_COLORFX_EMBOSS:
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p_effect = REG_EFFECT_EMBOSS;
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break;
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case V4L2_COLORFX_SEPIA:
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m_effect = REG_COLOR_EFFECT_ON;
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cfix_r = REG_CFIXR_SEPIA;
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cfix_b = REG_CFIXB_SEPIA;
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break;
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}
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ret = m5mols_write(sd, PARM_EFFECT, p_effect);
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if (!ret)
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ret = m5mols_write(sd, MON_EFFECT, m_effect);
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if (ret == 0 && m_effect == REG_COLOR_EFFECT_ON) {
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ret = m5mols_write(sd, MON_CFIXR, cfix_r);
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if (!ret)
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ret = m5mols_write(sd, MON_CFIXB, cfix_b);
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}
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v4l2_dbg(1, m5mols_debug, sd,
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"p_effect: %#x, m_effect: %#x, r: %#x, b: %#x (%d)\n",
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p_effect, m_effect, cfix_r, cfix_b, ret);
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return ret;
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}
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static int m5mols_set_iso(struct m5mols_info *info, int auto_iso)
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{
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u32 iso = auto_iso ? 0 : info->iso->val + 1;
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return m5mols_write(&info->sd, AE_ISO, iso);
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}
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static int m5mols_set_wdr(struct m5mols_info *info, int wdr)
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{
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int ret;
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ret = m5mols_write(&info->sd, MON_TONE_CTL, wdr ? 9 : 5);
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if (ret < 0)
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return ret;
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ret = m5mols_set_mode(info, REG_CAPTURE);
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if (ret < 0)
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return ret;
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return m5mols_write(&info->sd, CAPP_WDR_EN, wdr);
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}
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static int m5mols_set_stabilization(struct m5mols_info *info, int val)
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{
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struct v4l2_subdev *sd = &info->sd;
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unsigned int evp = val ? 0xe : 0x0;
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int ret;
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ret = m5mols_write(sd, AE_EV_PRESET_MONITOR, evp);
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if (ret < 0)
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return ret;
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return m5mols_write(sd, AE_EV_PRESET_CAPTURE, evp);
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}
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static int m5mols_g_volatile_ctrl(struct v4l2_ctrl *ctrl)
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{
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struct v4l2_subdev *sd = to_sd(ctrl);
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struct m5mols_info *info = to_m5mols(sd);
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int ret = 0;
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u8 status;
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v4l2_dbg(1, m5mols_debug, sd, "%s: ctrl: %s (%d)\n",
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__func__, ctrl->name, info->isp_ready);
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if (!info->isp_ready)
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return -EBUSY;
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switch (ctrl->id) {
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case V4L2_CID_ISO_SENSITIVITY_AUTO:
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ret = m5mols_read_u8(sd, AE_ISO, &status);
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|
if (ret == 0)
|
|
ctrl->val = !status;
|
|
if (status != REG_ISO_AUTO)
|
|
info->iso->val = status - 1;
|
|
break;
|
|
|
|
case V4L2_CID_3A_LOCK:
|
|
ctrl->val &= ~0x7;
|
|
|
|
ret = m5mols_read_u8(sd, AE_LOCK, &status);
|
|
if (ret)
|
|
return ret;
|
|
if (status)
|
|
info->lock_3a->val |= V4L2_LOCK_EXPOSURE;
|
|
|
|
ret = m5mols_read_u8(sd, AWB_LOCK, &status);
|
|
if (ret)
|
|
return ret;
|
|
if (status)
|
|
info->lock_3a->val |= V4L2_LOCK_EXPOSURE;
|
|
|
|
ret = m5mols_read_u8(sd, AF_EXECUTE, &status);
|
|
if (!status)
|
|
info->lock_3a->val |= V4L2_LOCK_EXPOSURE;
|
|
break;
|
|
}
|
|
|
|
return ret;
|
|
}
|
|
|
|
static int m5mols_s_ctrl(struct v4l2_ctrl *ctrl)
|
|
{
|
|
unsigned int ctrl_mode = m5mols_get_ctrl_mode(ctrl);
|
|
struct v4l2_subdev *sd = to_sd(ctrl);
|
|
struct m5mols_info *info = to_m5mols(sd);
|
|
int last_mode = info->mode;
|
|
int ret = 0;
|
|
|
|
/*
|
|
* If needed, defer restoring the controls until
|
|
* the device is fully initialized.
|
|
*/
|
|
if (!info->isp_ready) {
|
|
info->ctrl_sync = 0;
|
|
return 0;
|
|
}
|
|
|
|
v4l2_dbg(1, m5mols_debug, sd, "%s: %s, val: %d, priv: %p\n",
|
|
__func__, ctrl->name, ctrl->val, ctrl->priv);
|
|
|
|
if (ctrl_mode && ctrl_mode != info->mode) {
|
|
ret = m5mols_set_mode(info, ctrl_mode);
|
|
if (ret < 0)
|
|
return ret;
|
|
}
|
|
|
|
switch (ctrl->id) {
|
|
case V4L2_CID_3A_LOCK:
|
|
ret = m5mols_3a_lock(info, ctrl);
|
|
break;
|
|
|
|
case V4L2_CID_ZOOM_ABSOLUTE:
|
|
ret = m5mols_write(sd, MON_ZOOM, ctrl->val);
|
|
break;
|
|
|
|
case V4L2_CID_EXPOSURE_AUTO:
|
|
ret = m5mols_set_exposure(info, ctrl->val);
|
|
break;
|
|
|
|
case V4L2_CID_ISO_SENSITIVITY:
|
|
ret = m5mols_set_iso(info, ctrl->val);
|
|
break;
|
|
|
|
case V4L2_CID_AUTO_N_PRESET_WHITE_BALANCE:
|
|
ret = m5mols_set_white_balance(info, ctrl->val);
|
|
break;
|
|
|
|
case V4L2_CID_SATURATION:
|
|
ret = m5mols_set_saturation(info, ctrl->val);
|
|
break;
|
|
|
|
case V4L2_CID_COLORFX:
|
|
ret = m5mols_set_color_effect(info, ctrl->val);
|
|
break;
|
|
|
|
case V4L2_CID_WIDE_DYNAMIC_RANGE:
|
|
ret = m5mols_set_wdr(info, ctrl->val);
|
|
break;
|
|
|
|
case V4L2_CID_IMAGE_STABILIZATION:
|
|
ret = m5mols_set_stabilization(info, ctrl->val);
|
|
break;
|
|
|
|
case V4L2_CID_JPEG_COMPRESSION_QUALITY:
|
|
ret = m5mols_write(sd, CAPP_JPEG_RATIO, ctrl->val);
|
|
break;
|
|
}
|
|
|
|
if (ret == 0 && info->mode != last_mode)
|
|
ret = m5mols_set_mode(info, last_mode);
|
|
|
|
return ret;
|
|
}
|
|
|
|
static const struct v4l2_ctrl_ops m5mols_ctrl_ops = {
|
|
.g_volatile_ctrl = m5mols_g_volatile_ctrl,
|
|
.s_ctrl = m5mols_s_ctrl,
|
|
};
|
|
|
|
/* Supported manual ISO values */
|
|
static const s64 iso_qmenu[] = {
|
|
/* AE_ISO: 0x01...0x07 (ISO: 50...3200) */
|
|
50000, 100000, 200000, 400000, 800000, 1600000, 3200000
|
|
};
|
|
|
|
/* Supported Exposure Bias values, -2.0EV...+2.0EV */
|
|
static const s64 ev_bias_qmenu[] = {
|
|
/* AE_INDEX: 0x00...0x08 */
|
|
-2000, -1500, -1000, -500, 0, 500, 1000, 1500, 2000
|
|
};
|
|
|
|
int m5mols_init_controls(struct v4l2_subdev *sd)
|
|
{
|
|
struct m5mols_info *info = to_m5mols(sd);
|
|
u16 exposure_max;
|
|
u16 zoom_step;
|
|
int ret;
|
|
|
|
/* Determine the firmware dependent control range and step values */
|
|
ret = m5mols_read_u16(sd, AE_MAX_GAIN_MON, &exposure_max);
|
|
if (ret < 0)
|
|
return ret;
|
|
|
|
zoom_step = is_manufacturer(info, REG_SAMSUNG_OPTICS) ? 31 : 1;
|
|
v4l2_ctrl_handler_init(&info->handle, 20);
|
|
|
|
info->auto_wb = v4l2_ctrl_new_std_menu(&info->handle,
|
|
&m5mols_ctrl_ops, V4L2_CID_AUTO_N_PRESET_WHITE_BALANCE,
|
|
9, ~0x3fe, V4L2_WHITE_BALANCE_AUTO);
|
|
|
|
/* Exposure control cluster */
|
|
info->auto_exposure = v4l2_ctrl_new_std_menu(&info->handle,
|
|
&m5mols_ctrl_ops, V4L2_CID_EXPOSURE_AUTO,
|
|
1, ~0x03, V4L2_EXPOSURE_AUTO);
|
|
|
|
info->exposure = v4l2_ctrl_new_std(&info->handle,
|
|
&m5mols_ctrl_ops, V4L2_CID_EXPOSURE,
|
|
0, exposure_max, 1, exposure_max / 2);
|
|
|
|
info->exposure_bias = v4l2_ctrl_new_int_menu(&info->handle,
|
|
&m5mols_ctrl_ops, V4L2_CID_AUTO_EXPOSURE_BIAS,
|
|
ARRAY_SIZE(ev_bias_qmenu) - 1,
|
|
ARRAY_SIZE(ev_bias_qmenu)/2 - 1,
|
|
ev_bias_qmenu);
|
|
|
|
info->metering = v4l2_ctrl_new_std_menu(&info->handle,
|
|
&m5mols_ctrl_ops, V4L2_CID_EXPOSURE_METERING,
|
|
2, ~0x7, V4L2_EXPOSURE_METERING_AVERAGE);
|
|
|
|
/* ISO control cluster */
|
|
info->auto_iso = v4l2_ctrl_new_std_menu(&info->handle, &m5mols_ctrl_ops,
|
|
V4L2_CID_ISO_SENSITIVITY_AUTO, 1, ~0x03, 1);
|
|
|
|
info->iso = v4l2_ctrl_new_int_menu(&info->handle, &m5mols_ctrl_ops,
|
|
V4L2_CID_ISO_SENSITIVITY, ARRAY_SIZE(iso_qmenu) - 1,
|
|
ARRAY_SIZE(iso_qmenu)/2 - 1, iso_qmenu);
|
|
|
|
info->saturation = v4l2_ctrl_new_std(&info->handle, &m5mols_ctrl_ops,
|
|
V4L2_CID_SATURATION, 1, 5, 1, 3);
|
|
|
|
info->zoom = v4l2_ctrl_new_std(&info->handle, &m5mols_ctrl_ops,
|
|
V4L2_CID_ZOOM_ABSOLUTE, 1, 70, zoom_step, 1);
|
|
|
|
info->colorfx = v4l2_ctrl_new_std_menu(&info->handle, &m5mols_ctrl_ops,
|
|
V4L2_CID_COLORFX, 4, 0, V4L2_COLORFX_NONE);
|
|
|
|
info->wdr = v4l2_ctrl_new_std(&info->handle, &m5mols_ctrl_ops,
|
|
V4L2_CID_WIDE_DYNAMIC_RANGE, 0, 1, 1, 0);
|
|
|
|
info->stabilization = v4l2_ctrl_new_std(&info->handle, &m5mols_ctrl_ops,
|
|
V4L2_CID_IMAGE_STABILIZATION, 0, 1, 1, 0);
|
|
|
|
info->jpeg_quality = v4l2_ctrl_new_std(&info->handle, &m5mols_ctrl_ops,
|
|
V4L2_CID_JPEG_COMPRESSION_QUALITY, 1, 100, 1, 80);
|
|
|
|
info->lock_3a = v4l2_ctrl_new_std(&info->handle, &m5mols_ctrl_ops,
|
|
V4L2_CID_3A_LOCK, 0, 0x7, 0, 0);
|
|
|
|
if (info->handle.error) {
|
|
int ret = info->handle.error;
|
|
v4l2_err(sd, "Failed to initialize controls: %d\n", ret);
|
|
v4l2_ctrl_handler_free(&info->handle);
|
|
return ret;
|
|
}
|
|
|
|
v4l2_ctrl_auto_cluster(4, &info->auto_exposure, 1, false);
|
|
info->auto_iso->flags |= V4L2_CTRL_FLAG_VOLATILE |
|
|
V4L2_CTRL_FLAG_UPDATE;
|
|
v4l2_ctrl_auto_cluster(2, &info->auto_iso, 0, false);
|
|
|
|
info->lock_3a->flags |= V4L2_CTRL_FLAG_VOLATILE;
|
|
|
|
m5mols_set_ctrl_mode(info->auto_exposure, REG_PARAMETER);
|
|
m5mols_set_ctrl_mode(info->auto_wb, REG_PARAMETER);
|
|
m5mols_set_ctrl_mode(info->colorfx, REG_MONITOR);
|
|
|
|
sd->ctrl_handler = &info->handle;
|
|
|
|
return 0;
|
|
}
|