302 lines
10 KiB
C
302 lines
10 KiB
C
/*
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* Aic94xx SAS/SATA driver hardware registers definitions.
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*
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* Copyright (C) 2005 Adaptec, Inc. All rights reserved.
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* Copyright (C) 2005 Luben Tuikov <luben_tuikov@adaptec.com>
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*
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* This file is licensed under GPLv2.
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*
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* This file is part of the aic94xx driver.
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*
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* The aic94xx driver is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; version 2 of the
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* License.
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*
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* The aic94xx driver is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with the aic94xx driver; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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*
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*/
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#ifndef _AIC94XX_REG_H_
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#define _AIC94XX_REG_H_
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#include <asm/io.h>
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#include "aic94xx_hwi.h"
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/* Values */
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#define AIC9410_DEV_REV_B0 0x8
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/* MBAR0, SWA, SWB, SWC, internal memory space addresses */
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#define REG_BASE_ADDR 0xB8000000
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#define REG_BASE_ADDR_CSEQCIO 0xB8002000
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#define REG_BASE_ADDR_EXSI 0xB8042800
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#define MBAR0_SWA_SIZE 0x58
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extern u32 MBAR0_SWB_SIZE;
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#define MBAR0_SWC_SIZE 0x8
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/* MBAR1, points to On Chip Memory */
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#define OCM_BASE_ADDR 0xA0000000
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#define OCM_MAX_SIZE 0x20000
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/* Smallest address possible to reference */
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#define ALL_BASE_ADDR OCM_BASE_ADDR
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/* PCI configuration space registers */
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#define PCI_IOBAR_OFFSET 4
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#define PCI_CONF_MBAR1 0x6C
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#define PCI_CONF_MBAR0_SWA 0x70
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#define PCI_CONF_MBAR0_SWB 0x74
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#define PCI_CONF_MBAR0_SWC 0x78
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#define PCI_CONF_MBAR_KEY 0x7C
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#define PCI_CONF_FLSH_BAR 0xB8
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#include "aic94xx_reg_def.h"
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u8 asd_read_reg_byte(struct asd_ha_struct *asd_ha, u32 reg);
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u16 asd_read_reg_word(struct asd_ha_struct *asd_ha, u32 reg);
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u32 asd_read_reg_dword(struct asd_ha_struct *asd_ha, u32 reg);
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void asd_write_reg_byte(struct asd_ha_struct *asd_ha, u32 reg, u8 val);
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void asd_write_reg_word(struct asd_ha_struct *asd_ha, u32 reg, u16 val);
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void asd_write_reg_dword(struct asd_ha_struct *asd_ha, u32 reg, u32 val);
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void asd_read_reg_string(struct asd_ha_struct *asd_ha, void *dst,
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u32 offs, int count);
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void asd_write_reg_string(struct asd_ha_struct *asd_ha, void *src,
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u32 offs, int count);
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#define ASD_READ_OCM(type, ord, S) \
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static inline type asd_read_ocm_##ord (struct asd_ha_struct *asd_ha, \
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u32 offs) \
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{ \
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struct asd_ha_addrspace *io_handle = &asd_ha->io_handle[1]; \
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type val = read##S (io_handle->addr + (unsigned long) offs); \
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rmb(); \
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return val; \
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}
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ASD_READ_OCM(u8, byte, b);
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ASD_READ_OCM(u16,word, w);
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ASD_READ_OCM(u32,dword,l);
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#define ASD_WRITE_OCM(type, ord, S) \
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static inline void asd_write_ocm_##ord (struct asd_ha_struct *asd_ha, \
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u32 offs, type val) \
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{ \
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struct asd_ha_addrspace *io_handle = &asd_ha->io_handle[1]; \
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write##S (val, io_handle->addr + (unsigned long) offs); \
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return; \
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}
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ASD_WRITE_OCM(u8, byte, b);
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ASD_WRITE_OCM(u16,word, w);
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ASD_WRITE_OCM(u32,dword,l);
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#define ASD_DDBSITE_READ(type, ord) \
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static inline type asd_ddbsite_read_##ord (struct asd_ha_struct *asd_ha, \
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u16 ddb_site_no, \
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u16 offs) \
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{ \
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asd_write_reg_word(asd_ha, ALTCIOADR, MnDDB_SITE + offs); \
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asd_write_reg_word(asd_ha, ADDBPTR, ddb_site_no); \
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return asd_read_reg_##ord (asd_ha, CTXACCESS); \
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}
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ASD_DDBSITE_READ(u32, dword);
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ASD_DDBSITE_READ(u16, word);
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static inline u8 asd_ddbsite_read_byte(struct asd_ha_struct *asd_ha,
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u16 ddb_site_no,
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u16 offs)
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{
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if (offs & 1)
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return asd_ddbsite_read_word(asd_ha, ddb_site_no,
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offs & ~1) >> 8;
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else
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return asd_ddbsite_read_word(asd_ha, ddb_site_no,
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offs) & 0xFF;
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}
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#define ASD_DDBSITE_WRITE(type, ord) \
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static inline void asd_ddbsite_write_##ord (struct asd_ha_struct *asd_ha, \
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u16 ddb_site_no, \
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u16 offs, type val) \
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{ \
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asd_write_reg_word(asd_ha, ALTCIOADR, MnDDB_SITE + offs); \
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asd_write_reg_word(asd_ha, ADDBPTR, ddb_site_no); \
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asd_write_reg_##ord (asd_ha, CTXACCESS, val); \
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}
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ASD_DDBSITE_WRITE(u32, dword);
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ASD_DDBSITE_WRITE(u16, word);
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static inline void asd_ddbsite_write_byte(struct asd_ha_struct *asd_ha,
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u16 ddb_site_no,
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u16 offs, u8 val)
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{
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u16 base = offs & ~1;
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u16 rval = asd_ddbsite_read_word(asd_ha, ddb_site_no, base);
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if (offs & 1)
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rval = (val << 8) | (rval & 0xFF);
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else
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rval = (rval & 0xFF00) | val;
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asd_ddbsite_write_word(asd_ha, ddb_site_no, base, rval);
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}
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#define ASD_SCBSITE_READ(type, ord) \
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static inline type asd_scbsite_read_##ord (struct asd_ha_struct *asd_ha, \
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u16 scb_site_no, \
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u16 offs) \
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{ \
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asd_write_reg_word(asd_ha, ALTCIOADR, MnSCB_SITE + offs); \
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asd_write_reg_word(asd_ha, ASCBPTR, scb_site_no); \
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return asd_read_reg_##ord (asd_ha, CTXACCESS); \
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}
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ASD_SCBSITE_READ(u32, dword);
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ASD_SCBSITE_READ(u16, word);
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static inline u8 asd_scbsite_read_byte(struct asd_ha_struct *asd_ha,
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u16 scb_site_no,
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u16 offs)
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{
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if (offs & 1)
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return asd_scbsite_read_word(asd_ha, scb_site_no,
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offs & ~1) >> 8;
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else
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return asd_scbsite_read_word(asd_ha, scb_site_no,
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offs) & 0xFF;
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}
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#define ASD_SCBSITE_WRITE(type, ord) \
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static inline void asd_scbsite_write_##ord (struct asd_ha_struct *asd_ha, \
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u16 scb_site_no, \
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u16 offs, type val) \
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{ \
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asd_write_reg_word(asd_ha, ALTCIOADR, MnSCB_SITE + offs); \
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asd_write_reg_word(asd_ha, ASCBPTR, scb_site_no); \
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asd_write_reg_##ord (asd_ha, CTXACCESS, val); \
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}
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ASD_SCBSITE_WRITE(u32, dword);
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ASD_SCBSITE_WRITE(u16, word);
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static inline void asd_scbsite_write_byte(struct asd_ha_struct *asd_ha,
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u16 scb_site_no,
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u16 offs, u8 val)
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{
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u16 base = offs & ~1;
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u16 rval = asd_scbsite_read_word(asd_ha, scb_site_no, base);
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if (offs & 1)
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rval = (val << 8) | (rval & 0xFF);
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else
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rval = (rval & 0xFF00) | val;
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asd_scbsite_write_word(asd_ha, scb_site_no, base, rval);
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}
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/**
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* asd_ddbsite_update_word -- atomically update a word in a ddb site
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* @asd_ha: pointer to host adapter structure
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* @ddb_site_no: the DDB site number
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* @offs: the offset into the DDB
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* @oldval: old value found in that offset
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* @newval: the new value to replace it
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*
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* This function is used when the sequencers are running and we need to
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* update a DDB site atomically without expensive pausing and upausing
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* of the sequencers and accessing the DDB site through the CIO bus.
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*
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* Return 0 on success; -EFAULT on parity error; -EAGAIN if the old value
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* is different than the current value at that offset.
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*/
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static inline int asd_ddbsite_update_word(struct asd_ha_struct *asd_ha,
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u16 ddb_site_no, u16 offs,
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u16 oldval, u16 newval)
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{
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u8 done;
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u16 oval = asd_ddbsite_read_word(asd_ha, ddb_site_no, offs);
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if (oval != oldval)
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return -EAGAIN;
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asd_write_reg_word(asd_ha, AOLDDATA, oldval);
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asd_write_reg_word(asd_ha, ANEWDATA, newval);
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do {
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done = asd_read_reg_byte(asd_ha, ATOMICSTATCTL);
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} while (!(done & ATOMICDONE));
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if (done & ATOMICERR)
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return -EFAULT; /* parity error */
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else if (done & ATOMICWIN)
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return 0; /* success */
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else
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return -EAGAIN; /* oldval different than current value */
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}
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static inline int asd_ddbsite_update_byte(struct asd_ha_struct *asd_ha,
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u16 ddb_site_no, u16 offs,
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u8 _oldval, u8 _newval)
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{
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u16 base = offs & ~1;
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u16 oval;
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u16 nval = asd_ddbsite_read_word(asd_ha, ddb_site_no, base);
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if (offs & 1) {
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if ((nval >> 8) != _oldval)
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return -EAGAIN;
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nval = (_newval << 8) | (nval & 0xFF);
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oval = (_oldval << 8) | (nval & 0xFF);
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} else {
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if ((nval & 0xFF) != _oldval)
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return -EAGAIN;
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nval = (nval & 0xFF00) | _newval;
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oval = (nval & 0xFF00) | _oldval;
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}
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return asd_ddbsite_update_word(asd_ha, ddb_site_no, base, oval, nval);
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}
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static inline void asd_write_reg_addr(struct asd_ha_struct *asd_ha, u32 reg,
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dma_addr_t dma_handle)
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{
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asd_write_reg_dword(asd_ha, reg, ASD_BUSADDR_LO(dma_handle));
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asd_write_reg_dword(asd_ha, reg+4, ASD_BUSADDR_HI(dma_handle));
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}
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static inline u32 asd_get_cmdctx_size(struct asd_ha_struct *asd_ha)
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{
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/* DCHREVISION returns 0, possibly broken */
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u32 ctxmemsize = asd_read_reg_dword(asd_ha, LmMnINT(0,0)) & CTXMEMSIZE;
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return ctxmemsize ? 65536 : 32768;
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}
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static inline u32 asd_get_devctx_size(struct asd_ha_struct *asd_ha)
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{
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u32 ctxmemsize = asd_read_reg_dword(asd_ha, LmMnINT(0,0)) & CTXMEMSIZE;
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return ctxmemsize ? 8192 : 4096;
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}
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static inline void asd_disable_ints(struct asd_ha_struct *asd_ha)
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{
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asd_write_reg_dword(asd_ha, CHIMINTEN, RST_CHIMINTEN);
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}
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static inline void asd_enable_ints(struct asd_ha_struct *asd_ha)
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{
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/* Enable COM SAS interrupt on errors, COMSTAT */
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asd_write_reg_dword(asd_ha, COMSTATEN,
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EN_CSBUFPERR | EN_CSERR | EN_OVLYERR);
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/* Enable DCH SAS CFIFTOERR */
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asd_write_reg_dword(asd_ha, DCHSTATUS, EN_CFIFTOERR);
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/* Enable Host Device interrupts */
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asd_write_reg_dword(asd_ha, CHIMINTEN, SET_CHIMINTEN);
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}
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#endif
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