320 lines
8 KiB
C
320 lines
8 KiB
C
#ifndef _MAX86900_H_
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#define _MAX86900_H_
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#include <linux/delay.h>
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#include <linux/i2c.h>
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#include <linux/irq.h>
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#include <linux/input.h>
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#include <linux/init.h>
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/interrupt.h>
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#include <linux/leds.h>
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#include <linux/miscdevice.h>
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#include <linux/platform_device.h>
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#include <linux/regulator/consumer.h>
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#include <linux/slab.h>
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#include <linux/types.h>
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#include <linux/uaccess.h>
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#include <linux/workqueue.h>
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#include <linux/spinlock.h>
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#include <linux/gpio.h>
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#include <linux/kthread.h>
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#include <linux/sched.h>
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#include <linux/time.h>
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#include <linux/timer.h>
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#include <linux/pinctrl/consumer.h>
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#include "../pinctrl/core.h"
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#include <linux/pm_qos.h>
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#define MAX86902_DEBUG
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#define MAX86900_SLAVE_ADDR 0x51
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#define MAX86900A_SLAVE_ADDR 0x57
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#define MAX86902_SLAVE_ADDR 0x57
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//MAX86900 Registers
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#define MAX86900_INTERRUPT_STATUS 0x00
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#define MAX86900_INTERRUPT_ENABLE 0x01
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#define MAX86900_FIFO_WRITE_POINTER 0x02
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#define MAX86900_OVF_COUNTER 0x03
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#define MAX86900_FIFO_READ_POINTER 0x04
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#define MAX86900_FIFO_DATA 0x05
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#define MAX86900_MODE_CONFIGURATION 0x06
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#define MAX86900_SPO2_CONFIGURATION 0x07
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#define MAX86900_UV_CONFIGURATION 0x08
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#define MAX86900_LED_CONFIGURATION 0x09
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#define MAX86900_UV_DATA 0x0F
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#define MAX86900_TEMP_INTEGER 0x16
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#define MAX86900_TEMP_FRACTION 0x17
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#define MAX86900_WHOAMI_REG 0xFE
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#define MAX86900_FIFO_SIZE 16
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//MAX86902 Registers
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#define MAX_UV_DATA 2
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#define MODE_UV 1
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#define MODE_HR 2
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#define MODE_SPO2 3
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#define MODE_FLEX 7
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#define MODE_GEST 8
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#define IR_LED_CH 1
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#define RED_LED_CH 2
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#define NA_LED_CH 3
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#define VIOLET_LED_CH 4
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#define NUM_BYTES_PER_SAMPLE 3
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#define MAX_LED_NUM 4
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#define MAX86902_INTERRUPT_STATUS 0x00
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#define PWR_RDY_MASK 0x01
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#define UV_INST_OVF_MASK 0x02
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#define UV_ACCUM_OVF_MASK 0x04
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#define UV_RDY_MASK 0x08
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#define UV_RDY_OFFSET 0x03
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#define PROX_INT_MASK 0x10
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#define ALC_OVF_MASK 0x20
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#define PPG_RDY_MASK 0x40
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#define A_FULL_MASK 0x80
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#define MAX86902_INTERRUPT_STATUS_2 0x01
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#define THERM_RDY 0x01
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#define DIE_TEMP_RDY 0x02
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#define MAX86902_INTERRUPT_ENABLE 0x02
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#define MAX86902_INTERRUPT_ENABLE_2 0x03
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#define MAX86902_FIFO_WRITE_POINTER 0x04
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#define MAX86902_OVF_COUNTER 0x05
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#define MAX86902_FIFO_READ_POINTER 0x06
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#define MAX86902_FIFO_DATA 0x07
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#define MAX86902_FIFO_CONFIG 0x08
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#define MAX86902_FIFO_A_FULL_MASK 0x0F
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#define MAX86902_FIFO_A_FULL_OFFSET 0x00
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#define MAX86902_FIFO_ROLLS_ON_MASK 0x10
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#define MAX86902_FIFO_ROLLS_ON_OFFSET 0x04
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#define MAX86902_SMP_AVE_MASK 0xE0
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#define MAX86902_SMP_AVE_OFFSET 0x05
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#define MAX86902_MODE_CONFIGURATION 0x09
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#define MAX86902_MODE_MASK 0x07
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#define MAX86902_MODE_OFFSET 0x00
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#define MAX86902_GESTURE_EN_MASK 0x08
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#define MAX86902_GESTURE_EN_OFFSET 0x03
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#define MAX86902_RESET_MASK 0x40
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#define MAX86902_RESET_OFFSET 0x06
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#define MAX86902_SHDN_MASK 0x80
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#define MAX86902_SHDN_OFFSET 0x07
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#define MAX86902_SPO2_CONFIGURATION 0x0A
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#define MAX86902_LED_PW_MASK 0x03
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#define MAX86902_LED_PW_OFFSET 0x00
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#define MAX86902_SPO2_SR_MASK 0x1C
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#define MAX86902_SPO2_SR_OFFSET 0x02
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#define MAX86902_SPO2_ADC_RGE_MASK 0x60
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#define MAX86902_SPO2_ADC_RGE_OFFSET 0x05
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#define MAX86902_SPO2_EN_DACX_MASK 0x80
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#define MAX86902_SPO2_EN_DACX_OFFSET 0x07
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#define MAX86902_UV_CONFIGURATION 0x0B
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#define MAX86902_UV_ADC_RGE_MASK 0x03
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#define MAX86902_UV_ADC_RGE_OFFSET 0x00
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#define MAX86902_UV_SR_MASK 0x04
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#define MAX86902_UV_SR_OFFSET 0x02
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#define MAX86902_UV_TC_ON_MASK 0x08
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#define MAX86902_UV_TC_ON_OFFSET 0x03
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#define MAX86902_UV_ACC_CLR_MASK 0x80
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#define MAX86902_UV_ACC_CLR_OFFSET 0x07
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#define MAX86902_LED1_PA 0x0C
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#define MAX86902_LED2_PA 0x0D
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#define MAX86902_LED3_PA 0x0E
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#define MAX86902_LED4_PA 0x0F
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#define MAX86902_PILOT_PA 0x10
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/*THIS IS A BS ENTRY. KEPT HERE TO KEEP LEGACY CODE COMPUILING*/
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#define MAX86902_LED_CONFIGURATION 0x10
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#define MAX86902_LED_FLEX_CONTROL_1 0x11
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#define MAX86902_S1_MASK 0x07
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#define MAX86902_S1_OFFSET 0x00
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#define MAX86902_S2_MASK 0x70
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#define MAX86902_S2_OFFSET 0x04
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#define MAX86902_LED_FLEX_CONTROL_2 0x12
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#define MAX86902_S3_MASK 0x07
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#define MAX86902_S3_OFFSET 0x00
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#define MAX86902_S4_MASK 0x70
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#define MAX86902_S4_OFFSET 0x04
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#define MAX86902_UV_HI_THRESH 0x13
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#define MAX86902_UV_LOW_THRESH 0x14
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#define MAX86902_UV_ACC_THRESH_HI 0x15
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#define MAX86902_UV_ACC_THRESH_MID 0x16
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#define MAX86902_UV_ACC_THRESH_LOW 0x17
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#define MAX86902_UV_DATA_HI 0x18
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#define MAX86902_UV_DATA_LOW 0x19
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#define MAX86902_UV_ACC_DATA_HI 0x1A
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#define MAX86902_UV_ACC_DATA_MID 0x1B
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#define MAX86902_UV_ACC_DATA_LOW 0x1C
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#define MAX86902_UV_COUNTER_HI 0x1D
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#define MAX86902_UV_COUNTER_LOW 0x1E
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#define MAX86902_TEMP_INTEGER 0x1F
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#define MAX86902_TEMP_FRACTION 0x20
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#define MAX86902_TEMP_CONFIG 0x21
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#define MAX86902_TEMP_EN_MASK 0x01
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#define MAX86902_TEMP_EN_OFFSET 0x00
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#define MAX86902_WHOAMI_REG_REV 0xFE
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#define MAX86902_WHOAMI_REG_PART 0xFF
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#define MAX86902_FIFO_SIZE 64
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//Self Test
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#define MAX86900_TEST_MODE 0xFF
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#define MAX86900_TEST_GTST 0x80
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#define MAX86900_TEST_ENABLE_IDAC 0x81
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#define MAX86900_TEST_ENABLE_PLETH 0x82
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#define MAX86900_TEST_ALC 0x8F
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#define MAX86900_TEST_ROUTE_MODULATOR 0x97
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#define MAX86900_TEST_LOOK_MODE_RED 0x98
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#define MAX86900_TEST_LOOK_MODE_IR 0x99
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#define MAX86900_TEST_IDAC_GAIN 0x9C
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typedef enum _PART_TYPE
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{
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PART_TYPE_MAX86900 = 0,
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PART_TYPE_MAX86900A,
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PART_TYPE_MAX86900B,
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PART_TYPE_MAX86900C,
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PART_TYPE_MAX86906,
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PART_TYPE_MAX86902A = 10,
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PART_TYPE_MAX86902B,
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PART_TYPE_MAX86907,
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PART_TYPE_MAX86907A,
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} PART_TYPE;
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typedef enum _AWB_CONFIG
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{
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AWB_CONFIG0 = 0,
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AWB_CONFIG1,
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AWB_CONFIG2,
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} AWB_CONFIG;
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struct max86900_platform_data
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{
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int (*init)(void);
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int (*deinit)(void);
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};
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struct max86900_device_data
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{
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struct i2c_client *client; // represents the slave device
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struct device *dev;
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struct input_dev *hrm_input_dev;
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struct input_dev *hrmled_input_dev;
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struct input_dev *uv_input_dev;
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struct mutex i2clock;
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struct mutex activelock;
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struct mutex flickerdatalock;
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struct delayed_work uv_sr_work_queue;
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struct delayed_work reenable_work_queue;
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struct pinctrl *p;
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struct pinctrl_state *pins_sleep;
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struct pinctrl_state *pins_idle;
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struct miscdevice miscdev;
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struct pm_qos_request pm_qos_req_fpm;
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const char *led_3p3;
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const char *vdd_1p8;
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bool *bio_status;
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atomic_t hrm_is_enable;
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atomic_t uv_is_enable;
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atomic_t enhanced_uv_mode;
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atomic_t is_suspend;
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atomic_t hrm_need_reenable;
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atomic_t isEnable_led;
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atomic_t alc_is_enable;
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u8 led_current;
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u8 led_current1;
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u8 led_current2;
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u8 led_current3;
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u8 led_current4;
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u16 uv_sr_interval;
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u8 hr_range;
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u8 hr_range2;
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u8 look_mode_ir;
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u8 look_mode_red;
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u8 eol_test_is_enable;
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u8 uv_eol_test_is_enable;
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u8 part_type;
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u8 default_current;
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u8 default_current1;
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u8 default_current2;
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u8 default_current3;
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u8 default_current4;
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u8 test_current_ir;
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u8 test_current_red;
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u8 test_current_led1;
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u8 test_current_led2;
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u8 test_current_led3;
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u8 test_current_led4;
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u8 eol_test_status;
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u8 regulator_is_enable;
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u8 skip_i2c_msleep;
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u16 led;
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u16 sample_cnt;
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u16 uv_sample_cnt;
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u16 awb_sample_cnt;
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int dual_hrm;
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int hrm_int;
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int hrm_en;
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int irq;
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int hrm_temp;
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char *eol_test_result;
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char *lib_ver;
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char *uv_lib_ver;
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int ir_sum;
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int r_sum;
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int led_sum[4];
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int spo2_mode;
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u8 flex_mode;
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int num_samples;
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int sum_gesture_data;
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int hrm_threshold;
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u8 reenable_set;
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u8 reenable_cnt;
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u8 irq_state;
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int *flicker_data;
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int flicker_data_cnt;
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int thres1;
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int thres2;
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int thres3;
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int thres4;
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u8 awb_flicker_status;
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};
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extern int sensors_create_symlink(struct input_dev *inputdev);
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extern void sensors_remove_symlink(struct input_dev *inputdev);
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extern int sensors_register(struct device **dev, void * drvdata,
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struct device_attribute *attributes[], char *name);
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extern void sensors_unregister(struct device *dev,
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struct device_attribute *attributes[]);
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extern unsigned int lpcharge;
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#endif
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