169 lines
6.8 KiB
Text
169 lines
6.8 KiB
Text
* MSM Subsystem Power Manager (spm-v2)
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S4 generation of MSMs have SPM hardware blocks to control the Application
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Processor Sub-System power. These SPM blocks run individual state machine
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to determine what the core (L2 or Krait/Scorpion) would do when the WFI
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instruction is executed by the core. The SAW hardware block handles SPM and
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AVS functionality for the cores.
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The devicetree representation of the SPM block should be:
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Required properties
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- compatible: "qcom,spm-v2"
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- reg: The physical address and the size of the SPM's memory mapped registers
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- qcom,cpu: phandle for the CPU that the SPM block is attached to. This field
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is required on only for SPMs that control the CPU. This field is not required
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for SPMs that control L2/CCI/L3
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- qcom,saw2-ver-reg: The location of the version register
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- qcom,name: The name with which a SPM device is identified by the power
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management code.
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----------------------------------------------------
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Non-PSCI targets should follow the rules shown below
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----------------------------------------------------
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Required properties for only Non-PSCI targets:
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- qcom,saw2-cfg: SAW2 configuration register
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- qcom,saw2-spm-ctl: The SPM control register
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- qcom,saw2-spm-dly: Provides the values for the SPM delay command in the SPM
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sequence
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Optional properties for only Non-PSCI targets
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- reg-names: Register names for the physical address required if spm device
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has more than one physical addressed to be mapped. Allowed register
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names are: "saw-base", "q2s", "hw-flush", "slpreq"
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- qcom,saw2-avs-ctl: The AVS control register
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- qcom,saw2-avs-hysterisis: The AVS hysterisis register to delay the AVS
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controller requests
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- qcom,vctl-timeout-us: The timeout value in us to wait for voltage to change
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after sending the voltage command to the PMIC
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- qcom,saw2-avs-limit: The AVS limit register
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- qcom,saw2-avs-dly: The AVS delay register is used to specify the delay values
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between AVS controller requests
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- qcom,saw2-pmic-data0..7: Specify the pmic data value and the associated FTS
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index to send the PMIC data to
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- qcom,vctl-port: The PVC (PMIC Virtual Channel) port used for changing
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voltage
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- qcom,phase-port: The PVC port used for changing the number of phases
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- qcom,pfm-port: The PVC port used for enabling PWM/PFM modes
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- qcom,cpu-vctl-mask: Mask of cpus, whose voltage the spm device can control.
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Depricated: Replaced with cpu-vctl-list when cpu phandles are available.
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- qcom,cpu-vctl-list: List of cpu node phandles, whose voltage the spm device
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can control.
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- qcom,use-qchannel-for-pc: Boolean property to specify if qchannel should be
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ignored when entering power collapse. If this property is set qchannel
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will not be ignored in power collapse.
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- qcom,supports-rpm-hs: Indicates that this SPM instance allow handshake with
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RPM processor when executing the sleep command in the SPM sequence. Supported
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only on SAW2 v3.0 and above.
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- qcom,use-spm-clock-gating: This boolean property is used to indicate that
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the SPM needs to be used for clock gating. Using the SPM for clock
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gating would result in auto clock gating being disabled. Use this on
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targets that do not support or do not use auto clock gating.
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- qcom,use-qchannel-for-wfi: This boolean property is used to indicate
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that the SPM gets triggerd by the qchannel and not by means of
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wfi. So a wfe could trigger a spm for clock gating as well.
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- modes: Lists all the available low power modes for the device
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Second level properties for modes
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Required properties (if modes node is available)
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- qcom,label: Specifies the mode name such as:
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qcom,saw2-spm-cmd-wfi: WFI mode
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qcom,saw2-spm-cmd-ret: Retention mode
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qcom,saw2-spm-cmd-spc: Standalone PC mode
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qcom,saw2-spm-cmd-pc: Power Collapse mode
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qcom,saw2-spm-cmd-gdhs: GDHS mode
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- qcom,sequence: Specifies sequence for the low power mode
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Optional properties
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- qcom,pc_mode: Specifies pc_mode bit should be set in the SPM control register
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- qcom,ret_mode: Specifies ret_mode bit should be set in the SPM control register
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- qcom,spm_en: Specifies spm_en bit should be set in the SPM control register
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- qcom,isar: Specifies isar bit should be set in the SPM control register
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Specify this property only if SPM should retain its start address at
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the end of the program.
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- qcom,slp_cmd_mode: Specifies slp_cmd_mode bit should be set in SPM control register.
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Adding this property results in SPM handshaking with RPM. Please remove
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the RPM handshake command from the sleep sequence, replace that with
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Sleep without RPM handshake command.
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- qcom,event_sync: Specifies event_sync byte should be set in SPM control
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register.
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----------------------------------------------------
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PSCI targets should follow the rules shown below
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----------------------------------------------------
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Optional properties for only PSCI targets:
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- qcom,saw2-avs-ctl: The AVS control register
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- qcom,saw2-avs-hysterisis: The AVS hysterisis register to delay the AVS
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controller requests
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- qcom,vctl-timeout-us: The timeout value in us to wait for voltage to change
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after sending the voltage command to the PMIC
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- qcom,saw2-avs-limit: The AVS limit register
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- qcom,saw2-avs-dly: The AVS delay register is used to specify the delay values
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between AVS controller requests
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- qcom,vctl-port: The PVC (PMIC Virtual Channel) port used for changing
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voltage
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- qcom,phase-port: The PVC port used for changing the number of phases
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- qcom,pfm-port: The PVC port used for enabling PWM/PFM modes
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- qcom,cpu-vctl-list: List of cpu node phandles, whose voltage the spm device
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can control.
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Example 1:
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qcom,spm@f9089000 {
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compatible = "qcom,spm-v2";
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#address-cells = <1>;
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#size-cells = <1>;
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reg = <0xf9089000 0x1000>;
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qcom,cpu = <&CPU0>;
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qcom,saw2-ver-reg = <0xfd0>;
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qcom,saw2-cfg = <0x1b>;
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qcom,saw2-avs-ctl = <0>;
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qcom,saw2-avs-hysteresis = <0>;
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qcom,saw2-avs-limit = <0>;
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qcom,saw2-avs-dly= <0>;
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qcom,saw2-spm-dly= <0x20000400>;
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qcom,saw2-spm-ctl = <0x1>;
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qcom,cpu-vctl-list = <&CPU0 &CPU1 &CPU2 &CPU3>;
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qcom,mode0 {
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qcom,label = "qcom,saw2-spm-cmd-wfi";
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qcom,sequence = [03 0b 0f];
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qcom,spm_en;
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};
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qcom,mode1 {
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qcom,label = "qcom,saw2-spm-cmd-spc";
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qcom,sequence = [00 20 50 80 60 70 10 92
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a0 b0 03 68 70 3b 92 a0 b0
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82 2b 50 10 30 02 22 30 0f];
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qcom,spm_en;
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qcom,pc_mode;
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};
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qcom,mode2 {
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qcom,label = "qcom,saw2-spm-cmd-pc";
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qcom,sequence = [00 20 10 92 a0 b0 07 3b 92
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a0 b0 82 10 30 02 22 30 0f];
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qcom,spm_en;
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qcom,pc_mode;
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};
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};
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Example 2:
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qcom,spm@9A10000 {
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compatible = "qcom,spm-v2";
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#address-cells = <1>;
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#size-cells = <1>;
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reg = <0x9A10000 0x1000>;
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qcom,name = "system-cbf"; /* CBF SAW */
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qcom,saw2-ver-reg = <0xFD0>;
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qcom,cpu-vctl-list = <&CPU0 &CPU1 &CPU2 &CPU3>;
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qcom,vctl-timeout-us = <50>;
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qcom,vctl-port = <0x0>;
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qcom,phase-port = <0x1>;
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qcom,saw2-avs-ctl = <0x1100>;
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qcom,pfm-port = <0x2>;
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};
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