725 lines
17 KiB
C
725 lines
17 KiB
C
/*
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* Copyright (c) 2011-2013, The Linux Foundation. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 and
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* only version 2 as published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#define pr_fmt(fmt) "%s: " fmt, __func__
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#include <linux/module.h>
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#include <linux/delay.h>
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#include <linux/err.h>
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#include <linux/string.h>
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#include <linux/interrupt.h>
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#include <linux/kernel.h>
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#include <linux/slab.h>
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#include <linux/spmi.h>
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#include <linux/of.h>
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#include <linux/of_device.h>
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#include <linux/thermal.h>
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#include <linux/qpnp/qpnp-adc.h>
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#define QPNP_TM_DRIVER_NAME "qcom,qpnp-temp-alarm"
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enum qpnp_tm_registers {
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QPNP_TM_REG_TYPE = 0x04,
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QPNP_TM_REG_SUBTYPE = 0x05,
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QPNP_TM_REG_STATUS = 0x08,
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QPNP_TM_REG_SHUTDOWN_CTRL1 = 0x40,
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QPNP_TM_REG_SHUTDOWN_CTRL2 = 0x42,
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QPNP_TM_REG_ALARM_CTRL = 0x46,
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};
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#define QPNP_TM_TYPE 0x09
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#define QPNP_TM_SUBTYPE 0x08
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#define STATUS_STAGE_MASK 0x03
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#define SHUTDOWN_CTRL1_OVERRIDE_STAGE3 0x80
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#define SHUTDOWN_CTRL1_OVERRIDE_STAGE2 0x40
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#define SHUTDOWN_CTRL1_THRESHOLD_MASK 0x03
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#define SHUTDOWN_CTRL2_CLEAR_STAGE3 0x80
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#define SHUTDOWN_CTRL2_CLEAR_STAGE2 0x40
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#define ALARM_CTRL_FORCE_ENABLE 0x80
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#define ALARM_CTRL_FOLLOW_HW_ENABLE 0x01
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#define TEMP_STAGE_STEP 20000 /* Stage step: 20.000 C */
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#define TEMP_STAGE_HYSTERESIS 2000
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#define TEMP_THRESH_MIN 105000 /* Threshold Min: 105 C */
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#define TEMP_THRESH_STEP 5000 /* Threshold step: 5 C */
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#define THRESH_MIN 0
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#define THRESH_MAX 3
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/* Trip points from most critical to least critical */
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#define TRIP_STAGE3 0
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#define TRIP_STAGE2 1
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#define TRIP_STAGE1 2
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#define TRIP_NUM 3
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enum qpnp_tm_adc_type {
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QPNP_TM_ADC_NONE, /* Estimates temp based on overload level. */
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QPNP_TM_ADC_QPNP_ADC,
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};
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/*
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* Temperature in millicelcius reported during stage 0 if no ADC is present and
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* no value has been specified via device tree.
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*/
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#define DEFAULT_NO_ADC_TEMP 37000
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struct qpnp_tm_chip {
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struct delayed_work irq_work;
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struct spmi_device *spmi_dev;
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struct thermal_zone_device *tz_dev;
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const char *tm_name;
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enum qpnp_tm_adc_type adc_type;
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unsigned long temperature;
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enum thermal_device_mode mode;
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unsigned int thresh;
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unsigned int stage;
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unsigned int prev_stage;
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int irq;
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enum qpnp_vadc_channels adc_channel;
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u16 base_addr;
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bool allow_software_override;
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struct qpnp_vadc_chip *vadc_dev;
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};
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/* Delay between TEMP_STAT IRQ going high and status value changing in ms. */
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#define STATUS_REGISTER_DELAY_MS 40
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enum pmic_thermal_override_mode {
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SOFTWARE_OVERRIDE_DISABLED = 0,
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SOFTWARE_OVERRIDE_ENABLED,
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};
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static inline int qpnp_tm_read(struct qpnp_tm_chip *chip, u16 addr, u8 *buf,
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int len)
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{
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int rc;
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rc = spmi_ext_register_readl(chip->spmi_dev->ctrl,
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chip->spmi_dev->sid, chip->base_addr + addr, buf, len);
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if (rc)
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dev_err(&chip->spmi_dev->dev, "%s: spmi_ext_register_readl() failed. sid=%d, addr=%04X, len=%d, rc=%d\n",
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__func__, chip->spmi_dev->sid, chip->base_addr + addr,
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len, rc);
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return rc;
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}
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static inline int qpnp_tm_write(struct qpnp_tm_chip *chip, u16 addr, u8 *buf,
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int len)
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{
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int rc;
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rc = spmi_ext_register_writel(chip->spmi_dev->ctrl,
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chip->spmi_dev->sid, chip->base_addr + addr, buf, len);
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if (rc)
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dev_err(&chip->spmi_dev->dev, "%s: spmi_ext_register_writel() failed. sid=%d, addr=%04X, len=%d, rc=%d\n",
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__func__, chip->spmi_dev->sid, chip->base_addr + addr,
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len, rc);
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return rc;
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}
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static inline int qpnp_tm_shutdown_override(struct qpnp_tm_chip *chip,
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enum pmic_thermal_override_mode mode)
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{
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int rc = 0;
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u8 reg;
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if (chip->allow_software_override) {
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reg = chip->thresh & SHUTDOWN_CTRL1_THRESHOLD_MASK;
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if (mode == SOFTWARE_OVERRIDE_ENABLED)
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reg |= SHUTDOWN_CTRL1_OVERRIDE_STAGE2
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| SHUTDOWN_CTRL1_OVERRIDE_STAGE3;
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rc = qpnp_tm_write(chip, QPNP_TM_REG_SHUTDOWN_CTRL1, ®, 1);
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}
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return rc;
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}
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static int qpnp_tm_update_temp(struct qpnp_tm_chip *chip)
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{
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struct qpnp_vadc_result adc_result;
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int rc;
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rc = qpnp_vadc_read(chip->vadc_dev, chip->adc_channel, &adc_result);
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if (!rc)
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chip->temperature = adc_result.physical;
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else
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dev_err(&chip->spmi_dev->dev, "%s: qpnp_vadc_read(%d) failed, rc=%d\n",
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__func__, chip->adc_channel, rc);
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return rc;
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}
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/*
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* This function initializes the internal temperature value based on only the
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* current thermal stage and threshold.
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*/
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static int qpnp_tm_init_temp_no_adc(struct qpnp_tm_chip *chip)
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{
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int rc;
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u8 reg;
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rc = qpnp_tm_read(chip, QPNP_TM_REG_STATUS, ®, 1);
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if (rc < 0)
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return rc;
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chip->stage = reg & STATUS_STAGE_MASK;
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if (chip->stage)
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chip->temperature = chip->thresh * TEMP_THRESH_STEP +
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(chip->stage - 1) * TEMP_STAGE_STEP +
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TEMP_THRESH_MIN;
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return 0;
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}
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/*
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* This function updates the internal temperature value based on the
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* current thermal stage and threshold as well as the previous stage
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*/
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static int qpnp_tm_update_temp_no_adc(struct qpnp_tm_chip *chip)
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{
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unsigned int stage;
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int rc;
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u8 reg;
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rc = qpnp_tm_read(chip, QPNP_TM_REG_STATUS, ®, 1);
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if (rc < 0)
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return rc;
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stage = reg & STATUS_STAGE_MASK;
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if (stage > chip->stage) {
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/* increasing stage, use lower bound */
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chip->temperature = (stage - 1) * TEMP_STAGE_STEP
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+ chip->thresh * TEMP_THRESH_STEP
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+ TEMP_STAGE_HYSTERESIS + TEMP_THRESH_MIN;
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} else if (stage < chip->stage) {
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/* decreasing stage, use upper bound */
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chip->temperature = stage * TEMP_STAGE_STEP
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+ chip->thresh * TEMP_THRESH_STEP
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- TEMP_STAGE_HYSTERESIS + TEMP_THRESH_MIN;
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}
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chip->stage = stage;
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return 0;
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}
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static int qpnp_tz_get_temp_no_adc(struct thermal_zone_device *thermal,
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unsigned long *temperature)
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{
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struct qpnp_tm_chip *chip = thermal->devdata;
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int rc;
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if (!temperature)
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return -EINVAL;
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rc = qpnp_tm_update_temp_no_adc(chip);
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if (rc < 0)
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return rc;
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*temperature = chip->temperature;
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return 0;
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}
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static int qpnp_tz_get_temp_qpnp_adc(struct thermal_zone_device *thermal,
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unsigned long *temperature)
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{
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struct qpnp_tm_chip *chip = thermal->devdata;
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int rc;
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if (!temperature)
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return -EINVAL;
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rc = qpnp_tm_update_temp(chip);
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if (rc < 0) {
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dev_err(&chip->spmi_dev->dev, "%s: %s: adc read failed, rc = %d\n",
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__func__, chip->tm_name, rc);
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return rc;
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}
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*temperature = chip->temperature;
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return 0;
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}
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static int qpnp_tz_get_mode(struct thermal_zone_device *thermal,
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enum thermal_device_mode *mode)
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{
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struct qpnp_tm_chip *chip = thermal->devdata;
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if (!mode)
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return -EINVAL;
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*mode = chip->mode;
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return 0;
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}
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static int qpnp_tz_set_mode(struct thermal_zone_device *thermal,
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enum thermal_device_mode mode)
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{
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struct qpnp_tm_chip *chip = thermal->devdata;
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int rc = 0;
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if (mode != chip->mode) {
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if (mode == THERMAL_DEVICE_ENABLED)
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rc = qpnp_tm_shutdown_override(chip,
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SOFTWARE_OVERRIDE_ENABLED);
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else
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rc = qpnp_tm_shutdown_override(chip,
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SOFTWARE_OVERRIDE_DISABLED);
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chip->mode = mode;
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}
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return rc;
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}
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static int qpnp_tz_get_trip_type(struct thermal_zone_device *thermal,
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int trip, enum thermal_trip_type *type)
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{
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if (trip < 0 || !type)
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return -EINVAL;
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switch (trip) {
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case TRIP_STAGE3:
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*type = THERMAL_TRIP_CRITICAL;
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break;
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case TRIP_STAGE2:
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*type = THERMAL_TRIP_HOT;
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break;
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case TRIP_STAGE1:
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*type = THERMAL_TRIP_HOT;
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break;
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default:
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return -EINVAL;
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}
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return 0;
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}
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static int qpnp_tz_get_trip_temp(struct thermal_zone_device *thermal,
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int trip, unsigned long *temperature)
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{
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struct qpnp_tm_chip *chip = thermal->devdata;
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int thresh_temperature;
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if (trip < 0 || !temperature)
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return -EINVAL;
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thresh_temperature = chip->thresh * TEMP_THRESH_STEP + TEMP_THRESH_MIN;
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switch (trip) {
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case TRIP_STAGE3:
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thresh_temperature += 2 * TEMP_STAGE_STEP;
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break;
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case TRIP_STAGE2:
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thresh_temperature += TEMP_STAGE_STEP;
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break;
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case TRIP_STAGE1:
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break;
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default:
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return -EINVAL;
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}
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*temperature = thresh_temperature;
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return 0;
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}
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static int qpnp_tz_get_crit_temp(struct thermal_zone_device *thermal,
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unsigned long *temperature)
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{
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struct qpnp_tm_chip *chip = thermal->devdata;
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if (!temperature)
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return -EINVAL;
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*temperature = chip->thresh * TEMP_THRESH_STEP + TEMP_THRESH_MIN +
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2 * TEMP_STAGE_STEP;
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return 0;
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}
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static struct thermal_zone_device_ops qpnp_thermal_zone_ops_no_adc = {
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.get_temp = qpnp_tz_get_temp_no_adc,
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.get_mode = qpnp_tz_get_mode,
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.set_mode = qpnp_tz_set_mode,
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.get_trip_type = qpnp_tz_get_trip_type,
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.get_trip_temp = qpnp_tz_get_trip_temp,
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.get_crit_temp = qpnp_tz_get_crit_temp,
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};
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static struct thermal_zone_device_ops qpnp_thermal_zone_ops_qpnp_adc = {
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.get_temp = qpnp_tz_get_temp_qpnp_adc,
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.get_mode = qpnp_tz_get_mode,
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.set_mode = qpnp_tz_set_mode,
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.get_trip_type = qpnp_tz_get_trip_type,
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.get_trip_temp = qpnp_tz_get_trip_temp,
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.get_crit_temp = qpnp_tz_get_crit_temp,
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};
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static void qpnp_tm_work(struct work_struct *work)
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{
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struct delayed_work *dwork
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= container_of(work, struct delayed_work, work);
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struct qpnp_tm_chip *chip
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= container_of(dwork, struct qpnp_tm_chip, irq_work);
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int rc;
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u8 reg;
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if (chip->adc_type == QPNP_TM_ADC_NONE) {
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rc = qpnp_tm_update_temp_no_adc(chip);
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if (rc < 0)
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goto bail;
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} else {
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rc = qpnp_tm_read(chip, QPNP_TM_REG_STATUS, ®, 1);
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if (rc < 0)
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goto bail;
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chip->stage = reg & STATUS_STAGE_MASK;
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rc = qpnp_tm_update_temp(chip);
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if (rc < 0)
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goto bail;
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}
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if (chip->stage != chip->prev_stage) {
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chip->prev_stage = chip->stage;
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pr_crit("%s: PMIC Temp Alarm - stage=%u, threshold=%u, temperature=%lu mC\n",
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chip->tm_name, chip->stage, chip->thresh,
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chip->temperature);
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thermal_zone_device_update(chip->tz_dev);
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/* Notify user space */
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sysfs_notify(&chip->tz_dev->device.kobj, NULL, "type");
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}
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bail:
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return;
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}
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static irqreturn_t qpnp_tm_isr(int irq, void *data)
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{
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struct qpnp_tm_chip *chip = data;
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schedule_delayed_work(&chip->irq_work,
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msecs_to_jiffies(STATUS_REGISTER_DELAY_MS) + 1);
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return IRQ_HANDLED;
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}
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static int qpnp_tm_init_reg(struct qpnp_tm_chip *chip)
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{
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int rc = 0;
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u8 reg;
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if (chip->thresh < THRESH_MIN || chip->thresh > THRESH_MAX) {
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/* Read hardware threshold value if configuration is invalid. */
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rc = qpnp_tm_read(chip, QPNP_TM_REG_SHUTDOWN_CTRL1, ®, 1);
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if (rc < 0)
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return rc;
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chip->thresh = reg & SHUTDOWN_CTRL1_THRESHOLD_MASK;
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}
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/*
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* Set threshold and disable software override of stage 2 and 3
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* shutdowns.
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*/
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reg = chip->thresh & SHUTDOWN_CTRL1_THRESHOLD_MASK;
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rc = qpnp_tm_write(chip, QPNP_TM_REG_SHUTDOWN_CTRL1, ®, 1);
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if (rc < 0)
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return rc;
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/* Enable the thermal alarm PMIC module in always-on mode. */
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reg = ALARM_CTRL_FORCE_ENABLE;
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rc = qpnp_tm_write(chip, QPNP_TM_REG_ALARM_CTRL, ®, 1);
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return rc;
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}
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static int qpnp_tm_probe(struct spmi_device *spmi)
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{
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struct device_node *node;
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struct resource *res;
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struct qpnp_tm_chip *chip;
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struct thermal_zone_device_ops *tz_ops;
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char *tm_name;
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u32 default_temperature;
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int rc = 0;
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u8 raw_type[2], type, subtype;
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if (!spmi || !(&spmi->dev) || !spmi->dev.of_node) {
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dev_err(&spmi->dev, "%s: device tree node not found\n",
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__func__);
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return -EINVAL;
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}
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node = spmi->dev.of_node;
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chip = kzalloc(sizeof(struct qpnp_tm_chip), GFP_KERNEL);
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if (!chip) {
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dev_err(&spmi->dev, "%s: Can't allocate qpnp_tm_chip\n",
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__func__);
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return -ENOMEM;
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}
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dev_set_drvdata(&spmi->dev, chip);
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res = spmi_get_resource(spmi, NULL, IORESOURCE_MEM, 0);
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if (!res) {
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dev_err(&spmi->dev, "%s: node is missing base address\n",
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__func__);
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rc = -EINVAL;
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goto free_chip;
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}
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chip->base_addr = res->start;
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chip->spmi_dev = spmi;
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chip->irq = spmi_get_irq(spmi, NULL, 0);
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if (chip->irq < 0) {
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rc = chip->irq;
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dev_err(&spmi->dev, "%s: node is missing irq, rc=%d\n",
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__func__, rc);
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goto free_chip;
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}
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chip->tm_name = of_get_property(node, "label", NULL);
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if (chip->tm_name == NULL) {
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dev_err(&spmi->dev, "%s: node is missing label\n",
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__func__);
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rc = -EINVAL;
|
|
goto free_chip;
|
|
}
|
|
|
|
tm_name = kstrdup(chip->tm_name, GFP_KERNEL);
|
|
if (tm_name == NULL) {
|
|
dev_err(&spmi->dev, "%s: could not allocate memory for label\n",
|
|
__func__);
|
|
rc = -ENOMEM;
|
|
goto free_chip;
|
|
}
|
|
chip->tm_name = tm_name;
|
|
|
|
INIT_DELAYED_WORK(&chip->irq_work, qpnp_tm_work);
|
|
|
|
/* These bindings are optional, so it is okay if they are not found. */
|
|
chip->thresh = THRESH_MAX + 1;
|
|
rc = of_property_read_u32(node, "qcom,threshold-set", &chip->thresh);
|
|
if (!rc && (chip->thresh < THRESH_MIN || chip->thresh > THRESH_MAX))
|
|
dev_err(&spmi->dev, "%s: invalid qcom,threshold-set=%u specified\n",
|
|
__func__, chip->thresh);
|
|
|
|
chip->adc_type = QPNP_TM_ADC_NONE;
|
|
rc = of_property_read_u32(node, "qcom,channel-num", &chip->adc_channel);
|
|
if (!rc) {
|
|
if (chip->adc_channel < 0 || chip->adc_channel >= ADC_MAX_NUM) {
|
|
dev_err(&spmi->dev, "%s: invalid qcom,channel-num=%d specified\n",
|
|
__func__, chip->adc_channel);
|
|
} else {
|
|
chip->adc_type = QPNP_TM_ADC_QPNP_ADC;
|
|
chip->vadc_dev = qpnp_get_vadc(&spmi->dev,
|
|
"temp_alarm");
|
|
if (IS_ERR(chip->vadc_dev)) {
|
|
rc = PTR_ERR(chip->vadc_dev);
|
|
if (rc != -EPROBE_DEFER)
|
|
pr_err("vadc property missing\n");
|
|
goto err_cancel_work;
|
|
}
|
|
}
|
|
}
|
|
|
|
if (chip->adc_type == QPNP_TM_ADC_QPNP_ADC)
|
|
tz_ops = &qpnp_thermal_zone_ops_qpnp_adc;
|
|
else
|
|
tz_ops = &qpnp_thermal_zone_ops_no_adc;
|
|
|
|
chip->allow_software_override
|
|
= of_property_read_bool(node, "qcom,allow-override");
|
|
|
|
default_temperature = DEFAULT_NO_ADC_TEMP;
|
|
rc = of_property_read_u32(node, "qcom,default-temp",
|
|
&default_temperature);
|
|
chip->temperature = default_temperature;
|
|
|
|
rc = qpnp_tm_read(chip, QPNP_TM_REG_TYPE, raw_type, 2);
|
|
if (rc) {
|
|
dev_err(&spmi->dev, "%s: could not read type register, rc=%d\n",
|
|
__func__, rc);
|
|
goto err_cancel_work;
|
|
}
|
|
type = raw_type[0];
|
|
subtype = raw_type[1];
|
|
|
|
if (type != QPNP_TM_TYPE || subtype != QPNP_TM_SUBTYPE) {
|
|
dev_err(&spmi->dev, "%s: invalid type=%02X or subtype=%02X register value\n",
|
|
__func__, type, subtype);
|
|
rc = -ENODEV;
|
|
goto err_cancel_work;
|
|
}
|
|
|
|
rc = qpnp_tm_init_reg(chip);
|
|
if (rc) {
|
|
dev_err(&spmi->dev, "%s: qpnp_tm_init_reg() failed, rc=%d\n",
|
|
__func__, rc);
|
|
goto err_cancel_work;
|
|
}
|
|
|
|
if (chip->adc_type == QPNP_TM_ADC_NONE) {
|
|
rc = qpnp_tm_init_temp_no_adc(chip);
|
|
if (rc) {
|
|
dev_err(&spmi->dev, "%s: qpnp_tm_init_temp_no_adc() failed, rc=%d\n",
|
|
__func__, rc);
|
|
goto err_cancel_work;
|
|
}
|
|
}
|
|
|
|
/* Start in HW control; switch to SW control when user changes mode. */
|
|
chip->mode = THERMAL_DEVICE_DISABLED;
|
|
rc = qpnp_tm_shutdown_override(chip, SOFTWARE_OVERRIDE_DISABLED);
|
|
if (rc) {
|
|
dev_err(&spmi->dev, "%s: qpnp_tm_shutdown_override() failed, rc=%d\n",
|
|
__func__, rc);
|
|
goto err_cancel_work;
|
|
}
|
|
|
|
chip->tz_dev = thermal_zone_device_register(tm_name, TRIP_NUM, 0, chip,
|
|
tz_ops, NULL, 0, 0);
|
|
if (chip->tz_dev == NULL) {
|
|
dev_err(&spmi->dev, "%s: thermal_zone_device_register() failed.\n",
|
|
__func__);
|
|
rc = -ENODEV;
|
|
goto err_cancel_work;
|
|
}
|
|
|
|
rc = request_irq(chip->irq, qpnp_tm_isr, IRQF_TRIGGER_RISING, tm_name,
|
|
chip);
|
|
if (rc < 0) {
|
|
dev_err(&spmi->dev, "%s: request_irq(%d) failed: %d\n",
|
|
__func__, chip->irq, rc);
|
|
goto err_free_tz;
|
|
}
|
|
|
|
return 0;
|
|
|
|
err_free_tz:
|
|
thermal_zone_device_unregister(chip->tz_dev);
|
|
err_cancel_work:
|
|
cancel_delayed_work_sync(&chip->irq_work);
|
|
kfree(chip->tm_name);
|
|
free_chip:
|
|
dev_set_drvdata(&spmi->dev, NULL);
|
|
kfree(chip);
|
|
return rc;
|
|
}
|
|
|
|
static int qpnp_tm_remove(struct spmi_device *spmi)
|
|
{
|
|
struct qpnp_tm_chip *chip = dev_get_drvdata(&spmi->dev);
|
|
|
|
dev_set_drvdata(&spmi->dev, NULL);
|
|
thermal_zone_device_unregister(chip->tz_dev);
|
|
kfree(chip->tm_name);
|
|
qpnp_tm_shutdown_override(chip, SOFTWARE_OVERRIDE_DISABLED);
|
|
free_irq(chip->irq, chip);
|
|
cancel_delayed_work_sync(&chip->irq_work);
|
|
kfree(chip);
|
|
|
|
return 0;
|
|
}
|
|
|
|
#ifdef CONFIG_PM
|
|
static int qpnp_tm_suspend(struct device *dev)
|
|
{
|
|
struct qpnp_tm_chip *chip = dev_get_drvdata(dev);
|
|
|
|
/* Clear override bits in suspend to allow hardware control */
|
|
qpnp_tm_shutdown_override(chip, SOFTWARE_OVERRIDE_DISABLED);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int qpnp_tm_resume(struct device *dev)
|
|
{
|
|
struct qpnp_tm_chip *chip = dev_get_drvdata(dev);
|
|
|
|
/* Override hardware actions so software can control */
|
|
if (chip->mode == THERMAL_DEVICE_ENABLED)
|
|
qpnp_tm_shutdown_override(chip, SOFTWARE_OVERRIDE_ENABLED);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static const struct dev_pm_ops qpnp_tm_pm_ops = {
|
|
.suspend = qpnp_tm_suspend,
|
|
.resume = qpnp_tm_resume,
|
|
};
|
|
|
|
#define QPNP_TM_PM_OPS (&qpnp_tm_pm_ops)
|
|
#else
|
|
#define QPNP_TM_PM_OPS NULL
|
|
#endif
|
|
|
|
static struct of_device_id qpnp_tm_match_table[] = {
|
|
{ .compatible = QPNP_TM_DRIVER_NAME, },
|
|
{}
|
|
};
|
|
|
|
static const struct spmi_device_id qpnp_tm_id[] = {
|
|
{ QPNP_TM_DRIVER_NAME, 0 },
|
|
{}
|
|
};
|
|
|
|
static struct spmi_driver qpnp_tm_driver = {
|
|
.driver = {
|
|
.name = QPNP_TM_DRIVER_NAME,
|
|
.of_match_table = qpnp_tm_match_table,
|
|
.owner = THIS_MODULE,
|
|
.pm = QPNP_TM_PM_OPS,
|
|
},
|
|
.probe = qpnp_tm_probe,
|
|
.remove = qpnp_tm_remove,
|
|
.id_table = qpnp_tm_id,
|
|
};
|
|
|
|
int __init qpnp_tm_init(void)
|
|
{
|
|
return spmi_driver_register(&qpnp_tm_driver);
|
|
}
|
|
|
|
static void __exit qpnp_tm_exit(void)
|
|
{
|
|
spmi_driver_unregister(&qpnp_tm_driver);
|
|
}
|
|
|
|
module_init(qpnp_tm_init);
|
|
module_exit(qpnp_tm_exit);
|
|
|
|
MODULE_DESCRIPTION("QPNP PMIC Temperature Alarm driver");
|
|
MODULE_LICENSE("GPL v2");
|