501 lines
18 KiB
C
501 lines
18 KiB
C
/********************************************************************
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* *
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* THIS FILE IS PART OF THE OggTheora SOFTWARE CODEC SOURCE CODE. *
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* USE, DISTRIBUTION AND REPRODUCTION OF THIS LIBRARY SOURCE IS *
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* GOVERNED BY A BSD-STYLE SOURCE LICENSE INCLUDED WITH THIS SOURCE *
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* IN 'COPYING'. PLEASE READ THESE TERMS BEFORE DISTRIBUTING. *
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* *
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* THE Theora SOURCE CODE IS COPYRIGHT (C) 2002-2009 *
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* by the Xiph.Org Foundation http://www.xiph.org/ *
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* *
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********************************************************************
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function:
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last mod: $Id: dsp_mmx.c 14579 2008-03-12 06:42:40Z xiphmont $
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********************************************************************/
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#include <stddef.h>
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#include "x86enc.h"
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#include "sse2trans.h"
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#if defined(OC_X86_ASM)
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/*Load a 4x8 array of pixels values from %[src] and %[ref] and compute their
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16-bit differences.
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On output, these are stored in _m0, xmm1, xmm2, and xmm3.
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xmm4 and xmm5 are clobbered.*/
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#define OC_LOAD_SUB_4x8(_m0) \
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"#OC_LOAD_SUB_4x8\n\t" \
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/*Load the first three rows.*/ \
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"movq (%[src]),"_m0"\n\t" \
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"movq (%[ref]),%%xmm4\n\t" \
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"movq (%[src],%[ystride]),%%xmm1\n\t" \
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"movq (%[ref],%[ystride]),%%xmm3\n\t" \
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"movq (%[src],%[ystride],2),%%xmm2\n\t" \
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"movq (%[ref],%[ystride],2),%%xmm5\n\t" \
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/*Unpack and subtract.*/ \
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"punpcklbw %%xmm4,"_m0"\n\t" \
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"punpcklbw %%xmm4,%%xmm4\n\t" \
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"punpcklbw %%xmm3,%%xmm1\n\t" \
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"punpcklbw %%xmm3,%%xmm3\n\t" \
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"psubw %%xmm4,"_m0"\n\t" \
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"psubw %%xmm3,%%xmm1\n\t" \
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/*Load the last row.*/ \
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"movq (%[src],%[ystride3]),%%xmm3\n\t" \
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"movq (%[ref],%[ystride3]),%%xmm4\n\t" \
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/*Unpack, subtract, and advance the pointers.*/ \
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"punpcklbw %%xmm5,%%xmm2\n\t" \
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"punpcklbw %%xmm5,%%xmm5\n\t" \
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"lea (%[src],%[ystride],4),%[src]\n\t" \
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"psubw %%xmm5,%%xmm2\n\t" \
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"punpcklbw %%xmm4,%%xmm3\n\t" \
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"punpcklbw %%xmm4,%%xmm4\n\t" \
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"lea (%[ref],%[ystride],4),%[ref]\n\t" \
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"psubw %%xmm4,%%xmm3\n\t" \
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/*Square and accumulate four rows of differences in _m0, xmm1, xmm2, and xmm3.
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On output, xmm0 contains the sum of two of the rows, and the other two are
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added to xmm7.*/
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#define OC_SSD_4x8(_m0) \
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"pmaddwd "_m0","_m0"\n\t" \
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"pmaddwd %%xmm1,%%xmm1\n\t" \
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"pmaddwd %%xmm2,%%xmm2\n\t" \
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"pmaddwd %%xmm3,%%xmm3\n\t" \
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"paddd %%xmm1,"_m0"\n\t" \
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"paddd %%xmm3,%%xmm2\n\t" \
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"paddd %%xmm2,%%xmm7\n\t" \
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unsigned oc_enc_frag_ssd_sse2(const unsigned char *_src,
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const unsigned char *_ref,int _ystride){
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unsigned ret;
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__asm__ __volatile__(
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OC_LOAD_SUB_4x8("%%xmm7")
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OC_SSD_4x8("%%xmm7")
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OC_LOAD_SUB_4x8("%%xmm0")
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OC_SSD_4x8("%%xmm0")
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"paddd %%xmm0,%%xmm7\n\t"
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"movdqa %%xmm7,%%xmm6\n\t"
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"punpckhqdq %%xmm7,%%xmm7\n\t"
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"paddd %%xmm6,%%xmm7\n\t"
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"pshufd $1,%%xmm7,%%xmm6\n\t"
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"paddd %%xmm6,%%xmm7\n\t"
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"movd %%xmm7,%[ret]\n\t"
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:[ret]"=a"(ret)
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:[src]"r"(_src),[ref]"r"(_ref),[ystride]"r"((ptrdiff_t)_ystride),
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[ystride3]"r"((ptrdiff_t)_ystride*3)
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);
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return ret;
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}
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static const unsigned char __attribute__((aligned(16))) OC_MASK_CONSTS[8]={
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0x01,0x02,0x04,0x08,0x10,0x20,0x40,0x80
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};
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/*Load a 2x8 array of pixels values from %[src] and %[ref] and compute their
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horizontal sums as well as their 16-bit differences subject to a mask.
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%%xmm5 must contain OC_MASK_CONSTS[0...7] and %%xmm6 must contain 0.*/
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#define OC_LOAD_SUB_MASK_2x8 \
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"#OC_LOAD_SUB_MASK_2x8\n\t" \
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/*Start the loads and expand the next 8 bits of the mask.*/ \
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"shl $8,%[m]\n\t" \
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"movq (%[src]),%%xmm0\n\t" \
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"mov %h[m],%b[m]\n\t" \
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"movq (%[ref]),%%xmm2\n\t" \
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"movd %[m],%%xmm4\n\t" \
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"shr $8,%[m]\n\t" \
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"pshuflw $0x00,%%xmm4,%%xmm4\n\t" \
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"mov %h[m],%b[m]\n\t" \
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"pand %%xmm6,%%xmm4\n\t" \
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"pcmpeqb %%xmm6,%%xmm4\n\t" \
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/*Perform the masking.*/ \
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"pand %%xmm4,%%xmm0\n\t" \
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"pand %%xmm4,%%xmm2\n\t" \
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/*Finish the loads while unpacking the first set of rows, and expand the next
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8 bits of the mask.*/ \
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"movd %[m],%%xmm4\n\t" \
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"movq (%[src],%[ystride]),%%xmm1\n\t" \
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"pshuflw $0x00,%%xmm4,%%xmm4\n\t" \
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"movq (%[ref],%[ystride]),%%xmm3\n\t" \
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"pand %%xmm6,%%xmm4\n\t" \
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"punpcklbw %%xmm2,%%xmm0\n\t" \
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"pcmpeqb %%xmm6,%%xmm4\n\t" \
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"punpcklbw %%xmm2,%%xmm2\n\t" \
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/*Mask and unpack the second set of rows.*/ \
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"pand %%xmm4,%%xmm1\n\t" \
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"pand %%xmm4,%%xmm3\n\t" \
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"punpcklbw %%xmm3,%%xmm1\n\t" \
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"punpcklbw %%xmm3,%%xmm3\n\t" \
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"psubw %%xmm2,%%xmm0\n\t" \
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"psubw %%xmm3,%%xmm1\n\t" \
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unsigned oc_enc_frag_border_ssd_sse2(const unsigned char *_src,
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const unsigned char *_ref,int _ystride,ogg_int64_t _mask){
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ptrdiff_t ystride;
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unsigned ret;
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int i;
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ystride=_ystride;
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__asm__ __volatile__(
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"pxor %%xmm7,%%xmm7\n\t"
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"movq %[c],%%xmm6\n\t"
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:
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:[c]"m"(OC_CONST_ARRAY_OPERAND(unsigned char,OC_MASK_CONSTS,8))
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);
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for(i=0;i<4;i++){
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unsigned m;
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m=_mask&0xFFFF;
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_mask>>=16;
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if(m){
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__asm__ __volatile__(
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OC_LOAD_SUB_MASK_2x8
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"pmaddwd %%xmm0,%%xmm0\n\t"
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"pmaddwd %%xmm1,%%xmm1\n\t"
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"paddd %%xmm0,%%xmm7\n\t"
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"paddd %%xmm1,%%xmm7\n\t"
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:[src]"+r"(_src),[ref]"+r"(_ref),[ystride]"+r"(ystride),[m]"+Q"(m)
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);
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}
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_src+=2*ystride;
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_ref+=2*ystride;
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}
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__asm__ __volatile__(
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"movdqa %%xmm7,%%xmm6\n\t"
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"punpckhqdq %%xmm7,%%xmm7\n\t"
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"paddd %%xmm6,%%xmm7\n\t"
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"pshufd $1,%%xmm7,%%xmm6\n\t"
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"paddd %%xmm6,%%xmm7\n\t"
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"movd %%xmm7,%[ret]\n\t"
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:[ret]"=a"(ret)
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);
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return ret;
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}
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/*Load an 8x8 array of pixel values from %[src] and %[ref] and compute their
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16-bit difference in %%xmm0...%%xmm7.*/
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#define OC_LOAD_SUB_8x8 \
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"#OC_LOAD_SUB_8x8\n\t" \
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"movq (%[src]),%%xmm0\n\t" \
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"movq (%[ref]),%%xmm4\n\t" \
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"movq (%[src],%[src_ystride]),%%xmm1\n\t" \
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"lea (%[src],%[src_ystride],2),%[src]\n\t" \
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"movq (%[ref],%[ref_ystride]),%%xmm5\n\t" \
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"lea (%[ref],%[ref_ystride],2),%[ref]\n\t" \
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"movq (%[src]),%%xmm2\n\t" \
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"movq (%[ref]),%%xmm7\n\t" \
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"movq (%[src],%[src_ystride]),%%xmm3\n\t" \
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"movq (%[ref],%[ref_ystride]),%%xmm6\n\t" \
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"punpcklbw %%xmm4,%%xmm0\n\t" \
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"lea (%[src],%[src_ystride],2),%[src]\n\t" \
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"punpcklbw %%xmm4,%%xmm4\n\t" \
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"lea (%[ref],%[ref_ystride],2),%[ref]\n\t" \
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"psubw %%xmm4,%%xmm0\n\t" \
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"movq (%[src]),%%xmm4\n\t" \
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"movdqa %%xmm0,"OC_MEM_OFFS(0x00,buf)"\n\t" \
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"movq (%[ref]),%%xmm0\n\t" \
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"punpcklbw %%xmm5,%%xmm1\n\t" \
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"punpcklbw %%xmm5,%%xmm5\n\t" \
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"psubw %%xmm5,%%xmm1\n\t" \
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"movq (%[src],%[src_ystride]),%%xmm5\n\t" \
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"punpcklbw %%xmm7,%%xmm2\n\t" \
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"punpcklbw %%xmm7,%%xmm7\n\t" \
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"psubw %%xmm7,%%xmm2\n\t" \
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"movq (%[ref],%[ref_ystride]),%%xmm7\n\t" \
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"punpcklbw %%xmm6,%%xmm3\n\t" \
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"lea (%[src],%[src_ystride],2),%[src]\n\t" \
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"punpcklbw %%xmm6,%%xmm6\n\t" \
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"psubw %%xmm6,%%xmm3\n\t" \
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"movq (%[src]),%%xmm6\n\t" \
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"punpcklbw %%xmm0,%%xmm4\n\t" \
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"lea (%[ref],%[ref_ystride],2),%[ref]\n\t" \
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"punpcklbw %%xmm0,%%xmm0\n\t" \
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"lea (%[src],%[src_ystride],2),%[src]\n\t" \
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"psubw %%xmm0,%%xmm4\n\t" \
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"movq (%[ref]),%%xmm0\n\t" \
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"punpcklbw %%xmm7,%%xmm5\n\t" \
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"neg %[src_ystride]\n\t" \
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"punpcklbw %%xmm7,%%xmm7\n\t" \
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"psubw %%xmm7,%%xmm5\n\t" \
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"movq (%[src],%[src_ystride]),%%xmm7\n\t" \
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"punpcklbw %%xmm0,%%xmm6\n\t" \
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"lea (%[ref],%[ref_ystride],2),%[ref]\n\t" \
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"punpcklbw %%xmm0,%%xmm0\n\t" \
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"neg %[ref_ystride]\n\t" \
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"psubw %%xmm0,%%xmm6\n\t" \
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"movq (%[ref],%[ref_ystride]),%%xmm0\n\t" \
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"punpcklbw %%xmm0,%%xmm7\n\t" \
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"punpcklbw %%xmm0,%%xmm0\n\t" \
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"psubw %%xmm0,%%xmm7\n\t" \
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"movdqa "OC_MEM_OFFS(0x00,buf)",%%xmm0\n\t" \
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/*Load an 8x8 array of pixel values from %[src] into %%xmm0...%%xmm7.*/
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#define OC_LOAD_8x8 \
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"#OC_LOAD_8x8\n\t" \
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"movq (%[src]),%%xmm0\n\t" \
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"movq (%[src],%[ystride]),%%xmm1\n\t" \
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"movq (%[src],%[ystride],2),%%xmm2\n\t" \
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"pxor %%xmm7,%%xmm7\n\t" \
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"movq (%[src],%[ystride3]),%%xmm3\n\t" \
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"punpcklbw %%xmm7,%%xmm0\n\t" \
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"movq (%[src4]),%%xmm4\n\t" \
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"punpcklbw %%xmm7,%%xmm1\n\t" \
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"movq (%[src4],%[ystride]),%%xmm5\n\t" \
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"punpcklbw %%xmm7,%%xmm2\n\t" \
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"movq (%[src4],%[ystride],2),%%xmm6\n\t" \
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"punpcklbw %%xmm7,%%xmm3\n\t" \
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"movq (%[src4],%[ystride3]),%%xmm7\n\t" \
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"punpcklbw %%xmm4,%%xmm4\n\t" \
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"punpcklbw %%xmm5,%%xmm5\n\t" \
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"psrlw $8,%%xmm4\n\t" \
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"psrlw $8,%%xmm5\n\t" \
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"punpcklbw %%xmm6,%%xmm6\n\t" \
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"punpcklbw %%xmm7,%%xmm7\n\t" \
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"psrlw $8,%%xmm6\n\t" \
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"psrlw $8,%%xmm7\n\t" \
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/*Performs the first two stages of an 8-point 1-D Hadamard transform in place.
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Outputs 1, 3, 4, and 5 from the second stage are negated (which allows us to
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perform this stage in place with no temporary registers).*/
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#define OC_HADAMARD_AB_8x8 \
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"#OC_HADAMARD_AB_8x8\n\t" \
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/*Stage A:*/ \
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"paddw %%xmm5,%%xmm1\n\t" \
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"paddw %%xmm6,%%xmm2\n\t" \
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"paddw %%xmm5,%%xmm5\n\t" \
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"paddw %%xmm6,%%xmm6\n\t" \
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"psubw %%xmm1,%%xmm5\n\t" \
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"psubw %%xmm2,%%xmm6\n\t" \
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"paddw %%xmm7,%%xmm3\n\t" \
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"paddw %%xmm4,%%xmm0\n\t" \
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"paddw %%xmm7,%%xmm7\n\t" \
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"paddw %%xmm4,%%xmm4\n\t" \
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"psubw %%xmm3,%%xmm7\n\t" \
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"psubw %%xmm0,%%xmm4\n\t" \
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/*Stage B:*/ \
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"paddw %%xmm2,%%xmm0\n\t" \
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"paddw %%xmm3,%%xmm1\n\t" \
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"paddw %%xmm6,%%xmm4\n\t" \
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"paddw %%xmm7,%%xmm5\n\t" \
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"paddw %%xmm2,%%xmm2\n\t" \
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"paddw %%xmm3,%%xmm3\n\t" \
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"paddw %%xmm6,%%xmm6\n\t" \
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"paddw %%xmm7,%%xmm7\n\t" \
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"psubw %%xmm0,%%xmm2\n\t" \
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"psubw %%xmm1,%%xmm3\n\t" \
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"psubw %%xmm4,%%xmm6\n\t" \
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"psubw %%xmm5,%%xmm7\n\t" \
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/*Performs the last stage of an 8-point 1-D Hadamard transform in place.
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Outputs 1, 3, 5, and 7 are negated (which allows us to perform this stage in
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place with no temporary registers).*/
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#define OC_HADAMARD_C_8x8 \
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"#OC_HADAMARD_C_8x8\n\t" \
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/*Stage C:*/ \
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"paddw %%xmm1,%%xmm0\n\t" \
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"paddw %%xmm3,%%xmm2\n\t" \
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"paddw %%xmm5,%%xmm4\n\t" \
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"paddw %%xmm7,%%xmm6\n\t" \
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"paddw %%xmm1,%%xmm1\n\t" \
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"paddw %%xmm3,%%xmm3\n\t" \
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"paddw %%xmm5,%%xmm5\n\t" \
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"paddw %%xmm7,%%xmm7\n\t" \
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"psubw %%xmm0,%%xmm1\n\t" \
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"psubw %%xmm2,%%xmm3\n\t" \
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"psubw %%xmm4,%%xmm5\n\t" \
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"psubw %%xmm6,%%xmm7\n\t" \
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/*Performs an 8-point 1-D Hadamard transform in place.
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Outputs 1, 2, 4, and 7 are negated (which allows us to perform the transform
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in place with no temporary registers).*/
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#define OC_HADAMARD_8x8 \
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OC_HADAMARD_AB_8x8 \
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OC_HADAMARD_C_8x8 \
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/*Performs the first part of the final stage of the Hadamard transform and
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summing of absolute values.
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At the end of this part, %%xmm1 will contain the DC coefficient of the
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transform.*/
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#define OC_HADAMARD_C_ABS_ACCUM_A_8x8 \
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/*We use the fact that \
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(abs(a+b)+abs(a-b))/2=max(abs(a),abs(b)) \
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to merge the final butterfly with the abs and the first stage of \
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accumulation. \
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Thus we can avoid using pabsw, which is not available until SSSE3. \
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Emulating pabsw takes 3 instructions, so the straightforward SSE2 \
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implementation would be (3+3)*8+7=55 instructions (+4 for spilling \
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registers). \
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Even with pabsw, it would be (3+1)*8+7=39 instructions (with no spills). \
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This implementation is only 26 (+4 for spilling registers).*/ \
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"#OC_HADAMARD_C_ABS_ACCUM_A_8x8\n\t" \
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"movdqa %%xmm7,"OC_MEM_OFFS(0x10,buf)"\n\t" \
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"movdqa %%xmm6,"OC_MEM_OFFS(0x00,buf)"\n\t" \
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/*xmm7={0x7FFF}x4 \
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xmm4=max(abs(xmm4),abs(xmm5))-0x7FFF*/ \
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"pcmpeqb %%xmm7,%%xmm7\n\t" \
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"movdqa %%xmm4,%%xmm6\n\t" \
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"psrlw $1,%%xmm7\n\t" \
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"paddw %%xmm5,%%xmm6\n\t" \
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"pmaxsw %%xmm5,%%xmm4\n\t" \
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"paddsw %%xmm7,%%xmm6\n\t" \
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"psubw %%xmm6,%%xmm4\n\t" \
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/*xmm2=max(abs(xmm2),abs(xmm3))-0x7FFF \
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xmm0=max(abs(xmm0),abs(xmm1))-0x7FFF*/ \
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"movdqa %%xmm2,%%xmm6\n\t" \
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"movdqa %%xmm0,%%xmm5\n\t" \
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"pmaxsw %%xmm3,%%xmm2\n\t" \
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"pmaxsw %%xmm1,%%xmm0\n\t" \
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"paddw %%xmm3,%%xmm6\n\t" \
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"movdqa "OC_MEM_OFFS(0x10,buf)",%%xmm3\n\t" \
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"paddw %%xmm5,%%xmm1\n\t" \
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"movdqa "OC_MEM_OFFS(0x00,buf)",%%xmm5\n\t" \
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/*Performs the second part of the final stage of the Hadamard transform and
|
|
summing of absolute values.*/
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|
#define OC_HADAMARD_C_ABS_ACCUM_B_8x8 \
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"#OC_HADAMARD_C_ABS_ACCUM_B_8x8\n\t" \
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"paddsw %%xmm7,%%xmm6\n\t" \
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"paddsw %%xmm7,%%xmm1\n\t" \
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|
"psubw %%xmm6,%%xmm2\n\t" \
|
|
"psubw %%xmm1,%%xmm0\n\t" \
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/*xmm7={1}x4 (needed for the horizontal add that follows) \
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|
xmm0+=xmm2+xmm4+max(abs(xmm3),abs(xmm5))-0x7FFF*/ \
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|
"movdqa %%xmm3,%%xmm6\n\t" \
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|
"pmaxsw %%xmm5,%%xmm3\n\t" \
|
|
"paddw %%xmm2,%%xmm0\n\t" \
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|
"paddw %%xmm5,%%xmm6\n\t" \
|
|
"paddw %%xmm4,%%xmm0\n\t" \
|
|
"paddsw %%xmm7,%%xmm6\n\t" \
|
|
"paddw %%xmm3,%%xmm0\n\t" \
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|
"psrlw $14,%%xmm7\n\t" \
|
|
"psubw %%xmm6,%%xmm0\n\t" \
|
|
|
|
/*Performs the last stage of an 8-point 1-D Hadamard transform, takes the
|
|
absolute value of each component, and accumulates everything into xmm0.*/
|
|
#define OC_HADAMARD_C_ABS_ACCUM_8x8 \
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|
OC_HADAMARD_C_ABS_ACCUM_A_8x8 \
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|
OC_HADAMARD_C_ABS_ACCUM_B_8x8 \
|
|
|
|
/*Performs an 8-point 1-D Hadamard transform, takes the absolute value of each
|
|
component, and accumulates everything into xmm0.
|
|
Note that xmm0 will have an extra 4 added to each column, and that after
|
|
removing this value, the remainder will be half the conventional value.*/
|
|
#define OC_HADAMARD_ABS_ACCUM_8x8 \
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|
OC_HADAMARD_AB_8x8 \
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|
OC_HADAMARD_C_ABS_ACCUM_8x8
|
|
|
|
static unsigned oc_int_frag_satd_sse2(int *_dc,
|
|
const unsigned char *_src,int _src_ystride,
|
|
const unsigned char *_ref,int _ref_ystride){
|
|
OC_ALIGN16(ogg_int16_t buf[16]);
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|
unsigned ret;
|
|
unsigned ret2;
|
|
int dc;
|
|
__asm__ __volatile__(
|
|
OC_LOAD_SUB_8x8
|
|
OC_HADAMARD_8x8
|
|
OC_TRANSPOSE_8x8
|
|
/*We split out the stages here so we can save the DC coefficient in the
|
|
middle.*/
|
|
OC_HADAMARD_AB_8x8
|
|
OC_HADAMARD_C_ABS_ACCUM_A_8x8
|
|
"movd %%xmm1,%[dc]\n\t"
|
|
OC_HADAMARD_C_ABS_ACCUM_B_8x8
|
|
/*Up to this point, everything fit in 16 bits (8 input + 1 for the
|
|
difference + 2*3 for the two 8-point 1-D Hadamards - 1 for the abs - 1
|
|
for the factor of two we dropped + 3 for the vertical accumulation).
|
|
Now we finally have to promote things to dwords.
|
|
We break this part out of OC_HADAMARD_ABS_ACCUM_8x8 to hide the long
|
|
latency of pmaddwd by starting to compute abs(dc) here.*/
|
|
"pmaddwd %%xmm7,%%xmm0\n\t"
|
|
"movsx %w[dc],%[dc]\n\t"
|
|
"cdq\n\t"
|
|
"movdqa %%xmm0,%%xmm1\n\t"
|
|
"punpckhqdq %%xmm0,%%xmm0\n\t"
|
|
"paddd %%xmm1,%%xmm0\n\t"
|
|
"pshuflw $0xE,%%xmm0,%%xmm1\n\t"
|
|
"paddd %%xmm1,%%xmm0\n\t"
|
|
"movd %%xmm0,%[ret]\n\t"
|
|
/*The sums produced by OC_HADAMARD_ABS_ACCUM_8x8 each have an extra 4
|
|
added to them, a factor of two removed, and the DC value included;
|
|
correct the final sum here.*/
|
|
"lea -64(%[ret2],%[ret],2),%[ret]\n\t"
|
|
"xor %[dc],%[ret2]\n\t"
|
|
"sub %[ret2],%[ret]\n\t"
|
|
/*Although it looks like we're using 7 registers here, gcc can alias %[ret]
|
|
and %[dc] with some of the inputs, since for once we don't write to
|
|
them until after we're done using everything but %[buf].*/
|
|
/*Note that _src_ystride and _ref_ystride must be given non-overlapping
|
|
constraints, otherewise if gcc can prove they're equal it will allocate
|
|
them to the same register (which is bad); _src and _ref face a similar
|
|
problem.
|
|
All four are destructively modified, but if we list them as output
|
|
constraints, gcc can't alias them with other outputs.*/
|
|
:[ret]"=r"(ret),[ret2]"=d"(ret2),[dc]"=a"(dc),
|
|
[buf]"=m"(OC_ARRAY_OPERAND(ogg_int16_t,buf,16))
|
|
:[src]"S"(_src),[src_ystride]"c"((ptrdiff_t)_src_ystride),
|
|
[ref]"a"(_ref),[ref_ystride]"d"((ptrdiff_t)_ref_ystride)
|
|
/*We have to use neg, so we actually clobber the condition codes for once
|
|
(not to mention sub, and add).*/
|
|
:"cc"
|
|
);
|
|
*_dc=dc;
|
|
return ret;
|
|
}
|
|
|
|
unsigned oc_enc_frag_satd_sse2(int *_dc,const unsigned char *_src,
|
|
const unsigned char *_ref,int _ystride){
|
|
return oc_int_frag_satd_sse2(_dc,_src,_ystride,_ref,_ystride);
|
|
}
|
|
|
|
unsigned oc_enc_frag_satd2_sse2(int *_dc,const unsigned char *_src,
|
|
const unsigned char *_ref1,const unsigned char *_ref2,int _ystride){
|
|
OC_ALIGN8(unsigned char ref[64]);
|
|
oc_int_frag_copy2_mmxext(ref,8,_ref1,_ref2,_ystride);
|
|
return oc_int_frag_satd_sse2(_dc,_src,_ystride,ref,8);
|
|
}
|
|
|
|
unsigned oc_enc_frag_intra_satd_sse2(int *_dc,
|
|
const unsigned char *_src,int _ystride){
|
|
OC_ALIGN16(ogg_int16_t buf[16]);
|
|
unsigned ret;
|
|
int dc;
|
|
__asm__ __volatile__(
|
|
OC_LOAD_8x8
|
|
OC_HADAMARD_8x8
|
|
OC_TRANSPOSE_8x8
|
|
/*We split out the stages here so we can save the DC coefficient in the
|
|
middle.*/
|
|
OC_HADAMARD_AB_8x8
|
|
OC_HADAMARD_C_ABS_ACCUM_A_8x8
|
|
"movd %%xmm1,%[dc]\n\t"
|
|
OC_HADAMARD_C_ABS_ACCUM_B_8x8
|
|
/*Up to this point, everything fit in 16 bits (8 input + 1 for the
|
|
difference + 2*3 for the two 8-point 1-D Hadamards - 1 for the abs - 1
|
|
for the factor of two we dropped + 3 for the vertical accumulation).
|
|
Now we finally have to promote things to dwords.*/
|
|
"pmaddwd %%xmm7,%%xmm0\n\t"
|
|
/*We assume that the DC coefficient is always positive (which is true,
|
|
because the input to the INTRA transform was not a difference).*/
|
|
"movzx %w[dc],%[dc]\n\t"
|
|
"movdqa %%xmm0,%%xmm1\n\t"
|
|
"punpckhqdq %%xmm0,%%xmm0\n\t"
|
|
"paddd %%xmm1,%%xmm0\n\t"
|
|
"pshuflw $0xE,%%xmm0,%%xmm1\n\t"
|
|
"paddd %%xmm1,%%xmm0\n\t"
|
|
"movd %%xmm0,%[ret]\n\t"
|
|
"lea -64(%[ret],%[ret]),%[ret]\n\t"
|
|
"sub %[dc],%[ret]\n\t"
|
|
/*Although it looks like we're using 7 registers here, gcc can alias %[ret]
|
|
and %[dc] with some of the inputs, since for once we don't write to
|
|
them until after we're done using everything but %[buf].*/
|
|
:[ret]"=a"(ret),[dc]"=r"(dc),
|
|
[buf]"=m"(OC_ARRAY_OPERAND(ogg_int16_t,buf,16))
|
|
:[src]"r"(_src),[src4]"r"(_src+4*_ystride),
|
|
[ystride]"r"((ptrdiff_t)_ystride),[ystride3]"r"((ptrdiff_t)3*_ystride)
|
|
/*We have to use sub, so we actually clobber the condition codes for once.*/
|
|
:"cc"
|
|
);
|
|
*_dc=dc;
|
|
return ret;
|
|
}
|
|
|
|
#endif
|