LDj3SNuD
|
2f1250ab04
|
Update AOpCodeTable.cs (#108)
|
2018-04-25 23:26:41 -03:00 |
|
LDj3SNuD
|
a5ad1e9a06
|
Add Cls_V, Clz_V, Orn_V instructions. Add 18 Tests: And_V, Bic_V, Bif_V, Bit_V, Bsl_V, Cls_V, Clz_V, Orn_V, Orr_V. (#104)
* Update AOpCodeTable.cs
* Update AInstEmitSimdLogical.cs
* Update AInstEmitSimdArithmetic.cs
* Update ASoftFallback.cs
* Update AInstEmitAlu.cs
* Update Pseudocode.cs
* Update Instructions.cs
* Update CpuTestSimdReg.cs
* Update CpuTestSimd.cs
|
2018-04-25 23:20:22 -03:00 |
|
gdkchan
|
a8ba340dde
|
Improved logging (#103)
|
2018-04-24 15:57:39 -03:00 |
|
gdkchan
|
db0aa54233
|
Print guest stack trace on a few points that can throw exceptions
|
2018-04-22 02:48:17 -03:00 |
|
gdkchan
|
bd9b1e2c6b
|
Stub a few services, add support for generating call stacks on the CPU
|
2018-04-22 01:22:46 -03:00 |
|
LDj3SNuD
|
302c1d2861
|
Fix Addp_S in AOpCodeTable. Add 5 Tests: ADDP (scalar), ADDP (vector), ADDV. (#96)
* Update AOpCodeTable.cs
* Update Pseudocode.cs
* Update Instructions.cs
* Update CpuTestSimd.cs
* Update CpuTestSimdReg.cs
* Update Instructions.cs
* Revert "Started to work in improving the sync primitives"
|
2018-04-21 16:15:04 -03:00 |
|
LDj3SNuD
|
2ccd995cb2
|
Add ADDHN{2}, RADDHN{2}, SUBHN{2}, RSUBHN{2} (vector) instructions. Add 8 Tests. (#92)
* Update AOpCodeTable.cs
* Update AInstEmitSimdArithmetic.cs
* Update Pseudocode.cs
* Update Instructions.cs
* Update Bits.cs
* Create CpuTestSimd.cs
* Create CpuTestSimdReg.cs
* Update CpuTestSimd.cs
Provide a better supply of input values for the 20 Simd Tests.
* Update CpuTestSimdReg.cs
Provide a better supply of input values for the 20 Simd Tests.
* Update AOpCodeTable.cs
* Update AInstEmitSimdArithmetic.cs
* Update CpuTestSimd.cs
* Update CpuTestSimdReg.cs
|
2018-04-20 12:40:15 -03:00 |
|
gdkchan
|
03002f6537
|
Add SvcSetThreadActivity, tweak SignalProcessWideKey, add fmul32i shader instructions and other small fixes
|
2018-04-19 16:18:30 -03:00 |
|
MS-DOS1999
|
76a5972378
|
Fix Fmin/max and add vector version, add and modifying fmin/max tests (#89)
|
2018-04-19 00:22:12 -03:00 |
|
LDj3SNuD
|
8b75080639
|
Add ABS (scalar & vector), ADD (scalar), NEG (scalar) instructions. (#88)
* Update AOpCodeTable.cs
* Update AInstEmitSimdArithmetic.cs
* Update AOpCodeTable.cs
|
2018-04-18 10:56:27 -03:00 |
|
LDj3SNuD
|
262b5b8054
|
Add TRN1 & TRN2 (vector) instructions. Add 4 simple tests (4S, 8B). (#77)
* Update AOpCodeTable.cs
* Update AInstEmitSimdMove.cs
* Update CpuTestSimdMove.cs
* Update AInstEmitSimdMove.cs
* Update CpuTestSimdMove.cs
|
2018-04-12 11:52:00 -03:00 |
|
gdkchan
|
9227b0ea59
|
[CPU] Speed up translation a little bit
|
2018-04-11 14:44:03 -03:00 |
|
gdkchan
|
cb29b4303c
|
[CPU] Fix CNT instruction
|
2018-04-10 20:58:32 -03:00 |
|
LDj3SNuD
|
7acd0e0122
|
Add FMUL (scalar, by element) instruction; add FRECPE, FRECPS (scalar & vector) instructions. Add 5 simple tests. (#74)
* Update AOpCodeTable.cs
* Update AInstEmitSimdArithmetic.cs
* Update AInstEmitSimdHelper.cs
* Update CpuTestSimdArithmetic.cs
* Update AOpCodeTable.cs
* Update AInstEmitSimdArithmetic.cs
|
2018-04-08 16:08:57 -03:00 |
|
gdkchan
|
980691f36b
|
[CPU] Fix CBZ/CBNZ with 32 bits operands
|
2018-04-06 17:22:26 -03:00 |
|
gdkchan
|
702daf2ff4
|
[CPU] Fail early when the index/size of the vector is invalid
|
2018-04-06 15:39:39 -03:00 |
|
gdkchan
|
df3cbadceb
|
Fix FRSQRTS and FCM* (scalar) instructions
|
2018-04-06 10:20:17 -03:00 |
|
gdkchan
|
36d9130592
|
Add FMLS (vector) instruction
|
2018-04-06 01:41:54 -03:00 |
|
gdkchan
|
f15b1c76a1
|
Add FRSQRTS and FCM* instructions
|
2018-04-05 23:28:12 -03:00 |
|
Merry
|
39f20d8d1a
|
Implement Frsqrte_S (#72)
* Implement Frsqrte_S
* Implement Frsqrte_V
* Add Frsqrte_S test
|
2018-04-05 20:36:19 -03:00 |
|
gdkchan
|
45c078d782
|
Add Faddp (vector) instruction
|
2018-04-04 22:13:10 -03:00 |
|
gdkchan
|
e16ca561cb
|
HashSet is not thread safe, hopefully this fixes the CPU issue where it throws a exception on Add
|
2018-04-04 18:17:37 -03:00 |
|
gdkchan
|
a20d6b34ab
|
Add PRFM (unscaled) instruction
|
2018-04-04 18:10:20 -03:00 |
|
gdkchan
|
7fe12ad169
|
Add FNEG (vector) instruction
|
2018-04-04 16:36:07 -03:00 |
|
gdkchan
|
0ac4681fa0
|
Fix 32-bits extended register instructions with 64-bits extensions
|
2018-03-30 23:32:06 -03:00 |
|
gdkchan
|
53e2d34905
|
Enable all ld/st (single structure) instructions
|
2018-03-30 18:06:02 -03:00 |
|
gdkchan
|
916540ff41
|
Fix EXT/Widening instruction carrying garbage values on some cases, fix ABD (it shouldn't accumulate, this is another variation of the instruction)
|
2018-03-30 17:37:31 -03:00 |
|
gdkchan
|
76ac31add6
|
Add BIT instruction
|
2018-03-30 16:46:00 -03:00 |
|
gdkchan
|
19b8344568
|
Add UABD instruction
|
2018-03-30 16:30:23 -03:00 |
|
gdkchan
|
ba43af5765
|
Add UABDL instruction
|
2018-03-30 16:16:16 -03:00 |
|
gdkchan
|
f42f39fd90
|
Add UADDL instruction
|
2018-03-30 15:55:28 -03:00 |
|
gdkchan
|
9b6fa1f89e
|
Add UHADD instruction
|
2018-03-30 12:37:07 -03:00 |
|
gdkchan
|
b2549d83bf
|
Add FNMADD instruction
|
2018-03-24 00:28:23 -03:00 |
|
LDj3SNuD
|
873a7cd112
|
Add Cls Instruction. (#67)
* Update AInstEmitAlu.cs
* Update ASoftFallback.cs
* Update AOpCodeTable.cs
|
2018-03-23 22:06:05 -03:00 |
|
MS-DOS1999
|
ca6cf1cc90
|
Add Frint Instructions and Tests (#62)
* add 'ADC 32bit and Overflow' test
* Add WZR/WSP tests
* fix ADC and ADDS
* add ADCS test
* add SBCS test
* indent my code and delete comment
* '/' <- i hate you x)
* remove spacebar char
* remove false tab
* add frintx_S test
* update frintx_S test
* add ASRV test
* fix new line
* fix PR
* fix indent
* Add add_V tests
* work on Frintx_V
* Add Frintx_V Instruction
* add some instruction and test
* Syntax + indent
* Delete Console Write
* Delete Console Write 2
* CR del
* Skip NaNs tests
* Skip NaNs tests 2
* Fix errors 1
* Fix errors 2
|
2018-03-23 07:40:23 -03:00 |
|
gdkchan
|
e922c3627a
|
Rename IpcServices -> Services
|
2018-03-20 17:00:00 -03:00 |
|
gdkchan
|
4940cf0ea5
|
Add BFI instruction, even more audout fixes
|
2018-03-16 00:42:44 -03:00 |
|
gdkchan
|
88c6160c62
|
Add MLA (vector by element), fixes some cases of MUL (vector by element)?
|
2018-03-15 22:36:47 -03:00 |
|
gdkchan
|
79a5939734
|
Improvements to audout (#58)
* Some audout refactoring and improvements
* More audio improvements
* Change ReadAsciiString to use long for the Size, avoids some casting
|
2018-03-15 21:06:24 -03:00 |
|
gdkchan
|
92f47d535e
|
Fix crc32 instruction with size greater than a byte
|
2018-03-15 18:14:22 -03:00 |
|
gdkchan
|
ee8fb18a0f
|
Fix CPU instruction Ld/St (single structure) with index != 0
|
2018-03-15 12:59:23 -03:00 |
|
gdkchan
|
b50bc46888
|
CPU fix for the cases using a Mask with shift = 0
|
2018-03-14 01:59:22 -03:00 |
|
gdkchan
|
d067b4d5e0
|
Remove unused function from CPU
|
2018-03-14 00:57:07 -03:00 |
|
gdkchan
|
553ba659c4
|
Add CRC32 instruction and SLI (vector)
|
2018-03-14 00:12:05 -03:00 |
|
gdkchan
|
2ed24af756
|
Add pl:u stub, use higher precision on CNTPCT_EL0 register tick count
|
2018-03-13 21:24:32 -03:00 |
|
gdkchan
|
6f4282daf8
|
IAudioDeviceService -> IAudioDevice
|
2018-03-12 16:31:09 -03:00 |
|
gdkchan
|
d88b5c7621
|
Fix GetAudioRenderersProcessMasterVolume which was totally wrong
|
2018-03-12 16:29:06 -03:00 |
|
gdkchan
|
7a27990faa
|
Allow more than one process, free resources on process dispose, implement SvcExitThread
|
2018-03-12 01:14:12 -03:00 |
|
gdkchan
|
28275a8976
|
Do not sign-extend timestamps
|
2018-03-10 20:51:55 -03:00 |
|
gdkchan
|
3777fb44cf
|
Allow to enable/disable memory checks even on release mode through the flag, return error for invalid addresses on SvcMap*Memory svcs, do not return error on SvcQueryMemory (instead, return reserved for the end of the address space), other minor tweaks
|
2018-03-10 20:39:16 -03:00 |
|